623 lines
14 KiB
C
623 lines
14 KiB
C
/* USER CODE BEGIN Header */
|
|
/**
|
|
******************************************************************************
|
|
* @file stm32f4xx_it.c
|
|
* @brief Interrupt Service Routines.
|
|
******************************************************************************
|
|
* @attention
|
|
*
|
|
* Copyright (c) 2023 STMicroelectronics.
|
|
* All rights reserved.
|
|
*
|
|
* This software is licensed under terms that can be found in the LICENSE file
|
|
* in the root directory of this software component.
|
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
|
*
|
|
******************************************************************************
|
|
*/
|
|
/* USER CODE END Header */
|
|
|
|
/* Includes ------------------------------------------------------------------*/
|
|
#include "main.h"
|
|
#include "stm32f4xx_it.h"
|
|
/* Private includes ----------------------------------------------------------*/
|
|
/* USER CODE BEGIN Includes */
|
|
/* USER CODE END Includes */
|
|
|
|
/* Private typedef -----------------------------------------------------------*/
|
|
/* USER CODE BEGIN TD */
|
|
|
|
/* USER CODE END TD */
|
|
|
|
/* Private define ------------------------------------------------------------*/
|
|
/* USER CODE BEGIN PD */
|
|
|
|
/* USER CODE END PD */
|
|
|
|
/* Private macro -------------------------------------------------------------*/
|
|
/* USER CODE BEGIN PM */
|
|
|
|
/* USER CODE END PM */
|
|
|
|
/* Private variables ---------------------------------------------------------*/
|
|
/* USER CODE BEGIN PV */
|
|
|
|
/* USER CODE END PV */
|
|
|
|
/* Private function prototypes -----------------------------------------------*/
|
|
/* USER CODE BEGIN PFP */
|
|
|
|
/* USER CODE END PFP */
|
|
|
|
/* Private user code ---------------------------------------------------------*/
|
|
/* USER CODE BEGIN 0 */
|
|
|
|
/* USER CODE END 0 */
|
|
|
|
/* External variables --------------------------------------------------------*/
|
|
extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
|
|
extern DMA_HandleTypeDef hdma_adc1;
|
|
extern CAN_HandleTypeDef hcan1;
|
|
extern CAN_HandleTypeDef hcan2;
|
|
extern DMA_HandleTypeDef hdma_i2c2_rx;
|
|
extern DMA_HandleTypeDef hdma_i2c2_tx;
|
|
extern I2C_HandleTypeDef hi2c2;
|
|
extern I2C_HandleTypeDef hi2c3;
|
|
extern DMA_HandleTypeDef hdma_spi1_rx;
|
|
extern DMA_HandleTypeDef hdma_spi1_tx;
|
|
extern DMA_HandleTypeDef hdma_spi2_rx;
|
|
extern DMA_HandleTypeDef hdma_spi2_tx;
|
|
extern SPI_HandleTypeDef hspi1;
|
|
extern SPI_HandleTypeDef hspi2;
|
|
extern TIM_HandleTypeDef htim8;
|
|
extern DMA_HandleTypeDef hdma_usart1_tx;
|
|
extern DMA_HandleTypeDef hdma_usart1_rx;
|
|
extern DMA_HandleTypeDef hdma_usart3_rx;
|
|
extern DMA_HandleTypeDef hdma_usart6_rx;
|
|
extern DMA_HandleTypeDef hdma_usart6_tx;
|
|
extern UART_HandleTypeDef huart1;
|
|
extern UART_HandleTypeDef huart3;
|
|
extern UART_HandleTypeDef huart6;
|
|
extern TIM_HandleTypeDef htim14;
|
|
|
|
/* USER CODE BEGIN EV */
|
|
|
|
/* USER CODE END EV */
|
|
|
|
/******************************************************************************/
|
|
/* Cortex-M4 Processor Interruption and Exception Handlers */
|
|
/******************************************************************************/
|
|
/**
|
|
* @brief This function handles Non maskable interrupt.
|
|
*/
|
|
void NMI_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
|
while (1)
|
|
{
|
|
}
|
|
/* USER CODE END NonMaskableInt_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles Hard fault interrupt.
|
|
*/
|
|
void HardFault_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
|
|
|
/* USER CODE END HardFault_IRQn 0 */
|
|
while (1)
|
|
{
|
|
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
|
/* USER CODE END W1_HardFault_IRQn 0 */
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles Memory management fault.
|
|
*/
|
|
void MemManage_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
|
|
|
/* USER CODE END MemoryManagement_IRQn 0 */
|
|
while (1)
|
|
{
|
|
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
|
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles Pre-fetch fault, memory access fault.
|
|
*/
|
|
void BusFault_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN BusFault_IRQn 0 */
|
|
|
|
/* USER CODE END BusFault_IRQn 0 */
|
|
while (1)
|
|
{
|
|
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
|
/* USER CODE END W1_BusFault_IRQn 0 */
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles Undefined instruction or illegal state.
|
|
*/
|
|
void UsageFault_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
|
|
|
/* USER CODE END UsageFault_IRQn 0 */
|
|
while (1)
|
|
{
|
|
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
|
/* USER CODE END W1_UsageFault_IRQn 0 */
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles Debug monitor.
|
|
*/
|
|
void DebugMon_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 0 */
|
|
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 1 */
|
|
}
|
|
|
|
/******************************************************************************/
|
|
/* STM32F4xx Peripheral Interrupt Handlers */
|
|
/* Add here the Interrupt Handlers for the used peripherals. */
|
|
/* For the available peripheral interrupt handler names, */
|
|
/* please refer to the startup file (startup_stm32f4xx.s). */
|
|
/******************************************************************************/
|
|
|
|
/**
|
|
* @brief This function handles Flash global interrupt.
|
|
*/
|
|
void FLASH_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN FLASH_IRQn 0 */
|
|
|
|
/* USER CODE END FLASH_IRQn 0 */
|
|
HAL_FLASH_IRQHandler();
|
|
/* USER CODE BEGIN FLASH_IRQn 1 */
|
|
|
|
/* USER CODE END FLASH_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles EXTI line3 interrupt.
|
|
*/
|
|
void EXTI3_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN EXTI3_IRQn 0 */
|
|
|
|
/* USER CODE END EXTI3_IRQn 0 */
|
|
HAL_GPIO_EXTI_IRQHandler(INT_MAG_Pin);
|
|
/* USER CODE BEGIN EXTI3_IRQn 1 */
|
|
|
|
/* USER CODE END EXTI3_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles EXTI line4 interrupt.
|
|
*/
|
|
void EXTI4_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN EXTI4_IRQn 0 */
|
|
|
|
/* USER CODE END EXTI4_IRQn 0 */
|
|
HAL_GPIO_EXTI_IRQHandler(INT_ACC_Pin);
|
|
/* USER CODE BEGIN EXTI4_IRQn 1 */
|
|
|
|
/* USER CODE END EXTI4_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA1 stream1 global interrupt.
|
|
*/
|
|
void DMA1_Stream1_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
|
|
|
|
/* USER CODE END DMA1_Stream1_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_usart3_rx);
|
|
/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
|
|
|
|
/* USER CODE END DMA1_Stream1_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA1 stream2 global interrupt.
|
|
*/
|
|
void DMA1_Stream2_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
|
|
|
|
/* USER CODE END DMA1_Stream2_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_i2c2_rx);
|
|
/* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
|
|
|
|
/* USER CODE END DMA1_Stream2_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA1 stream3 global interrupt.
|
|
*/
|
|
void DMA1_Stream3_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
|
|
|
|
/* USER CODE END DMA1_Stream3_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_spi2_rx);
|
|
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
|
|
|
|
/* USER CODE END DMA1_Stream3_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA1 stream4 global interrupt.
|
|
*/
|
|
void DMA1_Stream4_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
|
|
|
|
/* USER CODE END DMA1_Stream4_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_spi2_tx);
|
|
/* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
|
|
|
|
/* USER CODE END DMA1_Stream4_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles CAN1 RX0 interrupts.
|
|
*/
|
|
void CAN1_RX0_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN CAN1_RX0_IRQn 0 */
|
|
|
|
/* USER CODE END CAN1_RX0_IRQn 0 */
|
|
HAL_CAN_IRQHandler(&hcan1);
|
|
/* USER CODE BEGIN CAN1_RX0_IRQn 1 */
|
|
|
|
/* USER CODE END CAN1_RX0_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles CAN1 RX1 interrupt.
|
|
*/
|
|
void CAN1_RX1_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN CAN1_RX1_IRQn 0 */
|
|
|
|
/* USER CODE END CAN1_RX1_IRQn 0 */
|
|
HAL_CAN_IRQHandler(&hcan1);
|
|
/* USER CODE BEGIN CAN1_RX1_IRQn 1 */
|
|
|
|
/* USER CODE END CAN1_RX1_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles EXTI line[9:5] interrupts.
|
|
*/
|
|
void EXTI9_5_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN EXTI9_5_IRQn 0 */
|
|
|
|
/* USER CODE END EXTI9_5_IRQn 0 */
|
|
HAL_GPIO_EXTI_IRQHandler(INT_GYRO_Pin);
|
|
/* USER CODE BEGIN EXTI9_5_IRQn 1 */
|
|
|
|
/* USER CODE END EXTI9_5_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles I2C2 event interrupt.
|
|
*/
|
|
void I2C2_EV_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN I2C2_EV_IRQn 0 */
|
|
|
|
/* USER CODE END I2C2_EV_IRQn 0 */
|
|
HAL_I2C_EV_IRQHandler(&hi2c2);
|
|
/* USER CODE BEGIN I2C2_EV_IRQn 1 */
|
|
|
|
/* USER CODE END I2C2_EV_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles I2C2 error interrupt.
|
|
*/
|
|
void I2C2_ER_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN I2C2_ER_IRQn 0 */
|
|
|
|
/* USER CODE END I2C2_ER_IRQn 0 */
|
|
HAL_I2C_ER_IRQHandler(&hi2c2);
|
|
/* USER CODE BEGIN I2C2_ER_IRQn 1 */
|
|
|
|
/* USER CODE END I2C2_ER_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles SPI1 global interrupt.
|
|
*/
|
|
void SPI1_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN SPI1_IRQn 0 */
|
|
|
|
/* USER CODE END SPI1_IRQn 0 */
|
|
HAL_SPI_IRQHandler(&hspi1);
|
|
/* USER CODE BEGIN SPI1_IRQn 1 */
|
|
|
|
/* USER CODE END SPI1_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles SPI2 global interrupt.
|
|
*/
|
|
void SPI2_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN SPI2_IRQn 0 */
|
|
|
|
/* USER CODE END SPI2_IRQn 0 */
|
|
HAL_SPI_IRQHandler(&hspi2);
|
|
/* USER CODE BEGIN SPI2_IRQn 1 */
|
|
|
|
/* USER CODE END SPI2_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles USART1 global interrupt.
|
|
*/
|
|
void USART1_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN USART1_IRQn 0 */
|
|
|
|
/* USER CODE END USART1_IRQn 0 */
|
|
HAL_UART_IRQHandler(&huart1);
|
|
/* USER CODE BEGIN USART1_IRQn 1 */
|
|
|
|
/* USER CODE END USART1_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles USART3 global interrupt.
|
|
*/
|
|
void USART3_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN USART3_IRQn 0 */
|
|
|
|
/* USER CODE END USART3_IRQn 0 */
|
|
HAL_UART_IRQHandler(&huart3);
|
|
/* USER CODE BEGIN USART3_IRQn 1 */
|
|
|
|
/* USER CODE END USART3_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles TIM8 trigger and commutation interrupts and TIM14 global interrupt.
|
|
*/
|
|
void TIM8_TRG_COM_TIM14_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN TIM8_TRG_COM_TIM14_IRQn 0 */
|
|
|
|
/* USER CODE END TIM8_TRG_COM_TIM14_IRQn 0 */
|
|
HAL_TIM_IRQHandler(&htim8);
|
|
HAL_TIM_IRQHandler(&htim14);
|
|
/* USER CODE BEGIN TIM8_TRG_COM_TIM14_IRQn 1 */
|
|
|
|
/* USER CODE END TIM8_TRG_COM_TIM14_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA1 stream7 global interrupt.
|
|
*/
|
|
void DMA1_Stream7_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA1_Stream7_IRQn 0 */
|
|
|
|
/* USER CODE END DMA1_Stream7_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_i2c2_tx);
|
|
/* USER CODE BEGIN DMA1_Stream7_IRQn 1 */
|
|
|
|
/* USER CODE END DMA1_Stream7_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA2 stream0 global interrupt.
|
|
*/
|
|
void DMA2_Stream0_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
|
|
|
|
/* USER CODE END DMA2_Stream0_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_spi1_rx);
|
|
/* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
|
|
|
|
/* USER CODE END DMA2_Stream0_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA2 stream2 global interrupt.
|
|
*/
|
|
void DMA2_Stream2_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
|
|
|
|
/* USER CODE END DMA2_Stream2_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_usart6_rx);
|
|
/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
|
|
|
|
/* USER CODE END DMA2_Stream2_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA2 stream3 global interrupt.
|
|
*/
|
|
void DMA2_Stream3_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA2_Stream3_IRQn 0 */
|
|
|
|
/* USER CODE END DMA2_Stream3_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_spi1_tx);
|
|
/* USER CODE BEGIN DMA2_Stream3_IRQn 1 */
|
|
|
|
/* USER CODE END DMA2_Stream3_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA2 stream4 global interrupt.
|
|
*/
|
|
void DMA2_Stream4_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA2_Stream4_IRQn 0 */
|
|
|
|
/* USER CODE END DMA2_Stream4_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_adc1);
|
|
/* USER CODE BEGIN DMA2_Stream4_IRQn 1 */
|
|
|
|
/* USER CODE END DMA2_Stream4_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles CAN2 RX0 interrupts.
|
|
*/
|
|
void CAN2_RX0_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN CAN2_RX0_IRQn 0 */
|
|
|
|
/* USER CODE END CAN2_RX0_IRQn 0 */
|
|
HAL_CAN_IRQHandler(&hcan2);
|
|
/* USER CODE BEGIN CAN2_RX0_IRQn 1 */
|
|
|
|
/* USER CODE END CAN2_RX0_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles CAN2 RX1 interrupt.
|
|
*/
|
|
void CAN2_RX1_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN CAN2_RX1_IRQn 0 */
|
|
|
|
/* USER CODE END CAN2_RX1_IRQn 0 */
|
|
HAL_CAN_IRQHandler(&hcan2);
|
|
/* USER CODE BEGIN CAN2_RX1_IRQn 1 */
|
|
|
|
/* USER CODE END CAN2_RX1_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles USB On The Go FS global interrupt.
|
|
*/
|
|
void OTG_FS_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN OTG_FS_IRQn 0 */
|
|
|
|
/* USER CODE END OTG_FS_IRQn 0 */
|
|
HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
|
|
/* USER CODE BEGIN OTG_FS_IRQn 1 */
|
|
|
|
/* USER CODE END OTG_FS_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA2 stream5 global interrupt.
|
|
*/
|
|
void DMA2_Stream5_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA2_Stream5_IRQn 0 */
|
|
|
|
/* USER CODE END DMA2_Stream5_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_usart1_rx);
|
|
/* USER CODE BEGIN DMA2_Stream5_IRQn 1 */
|
|
|
|
/* USER CODE END DMA2_Stream5_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA2 stream6 global interrupt.
|
|
*/
|
|
void DMA2_Stream6_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
|
|
|
|
/* USER CODE END DMA2_Stream6_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_usart6_tx);
|
|
/* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
|
|
|
|
/* USER CODE END DMA2_Stream6_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles DMA2 stream7 global interrupt.
|
|
*/
|
|
void DMA2_Stream7_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
|
|
|
|
/* USER CODE END DMA2_Stream7_IRQn 0 */
|
|
HAL_DMA_IRQHandler(&hdma_usart1_tx);
|
|
/* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
|
|
|
|
/* USER CODE END DMA2_Stream7_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles USART6 global interrupt.
|
|
*/
|
|
void USART6_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN USART6_IRQn 0 */
|
|
|
|
/* USER CODE END USART6_IRQn 0 */
|
|
HAL_UART_IRQHandler(&huart6);
|
|
/* USER CODE BEGIN USART6_IRQn 1 */
|
|
|
|
/* USER CODE END USART6_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles I2C3 event interrupt.
|
|
*/
|
|
void I2C3_EV_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN I2C3_EV_IRQn 0 */
|
|
|
|
/* USER CODE END I2C3_EV_IRQn 0 */
|
|
HAL_I2C_EV_IRQHandler(&hi2c3);
|
|
/* USER CODE BEGIN I2C3_EV_IRQn 1 */
|
|
|
|
/* USER CODE END I2C3_EV_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles I2C3 error interrupt.
|
|
*/
|
|
void I2C3_ER_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN I2C3_ER_IRQn 0 */
|
|
|
|
/* USER CODE END I2C3_ER_IRQn 0 */
|
|
HAL_I2C_ER_IRQHandler(&hi2c3);
|
|
/* USER CODE BEGIN I2C3_ER_IRQn 1 */
|
|
|
|
/* USER CODE END I2C3_ER_IRQn 1 */
|
|
}
|
|
|
|
/* USER CODE BEGIN 1 */
|
|
|
|
/* USER CODE END 1 */
|