430 lines
25 KiB
C
430 lines
25 KiB
C
/*********************************************************************
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* SEGGER Microcontroller GmbH *
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* The Embedded Experts *
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**********************************************************************
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* *
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* (c) 1995 - 2021 SEGGER Microcontroller GmbH *
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* *
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* www.segger.com Support: support@segger.com *
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* *
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**********************************************************************
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* *
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* SEGGER RTT * Real Time Transfer for embedded targets *
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* *
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**********************************************************************
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* *
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* All rights reserved. *
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* *
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* SEGGER strongly recommends to not make any changes *
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* to or modify the source code of this software in order to stay *
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* compatible with the RTT protocol and J-Link. *
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* *
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* Redistribution and use in source and binary forms, with or *
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* without modification, are permitted provided that the following *
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* condition is met: *
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* *
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* o Redistributions of source code must retain the above copyright *
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* notice, this condition and the following disclaimer. *
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* *
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
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* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
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* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
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* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
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* DAMAGE. *
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* *
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**********************************************************************
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* *
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* RTT version: 7.58c *
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* *
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**********************************************************************
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---------------------------END-OF-HEADER------------------------------
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File : SEGGER_RTT_Conf.h
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Purpose : Implementation of SEGGER real-time transfer (RTT) which
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allows real-time communication on targets which support
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debugger memory accesses while the CPU is running.
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Revision: $Rev: 24316 $
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*/
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#ifndef SEGGER_RTT_CONF_H
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#define SEGGER_RTT_CONF_H
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#ifdef __IAR_SYSTEMS_ICC__
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#include <intrinsics.h>
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#endif
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/*********************************************************************
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*
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* Defines, configurable
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*
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**********************************************************************
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*/
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//
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// Take in and set to correct values for Cortex-A systems with CPU cache
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//
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//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system
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//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached
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//
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// Most common case:
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// Up-channel 0: RTT
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// Up-channel 1: SystemView
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//
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#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS
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#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3)
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#endif
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//
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// Most common case:
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// Down-channel 0: RTT
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// Down-channel 1: SystemView
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//
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#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
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#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3)
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#endif
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#ifndef BUFFER_SIZE_UP
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#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
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#endif
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#ifndef BUFFER_SIZE_DOWN
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#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
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#endif
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#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE
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#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
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#endif
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#ifndef SEGGER_RTT_MODE_DEFAULT
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#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
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#endif
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/*********************************************************************
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*
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* RTT memcpy configuration
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*
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* memcpy() is good for large amounts of data,
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* but the overhead is big for small amounts, which are usually stored via RTT.
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* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
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*
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* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
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* This is may be required with memory access restrictions,
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* such as on Cortex-A devices with MMU.
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*/
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#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP
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#define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop
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#endif
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//
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// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
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//
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//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
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// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes))
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//#endif
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//
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// Target is not allowed to perform other RTT operations while string still has not been stored completely.
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// Otherwise we would probably end up with a mixed string in the buffer.
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// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
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//
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// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
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// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
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// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
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// (Higher priority = lower priority number)
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// Default value for embOS: 128u
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// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
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// or define SEGGER_RTT_LOCK() to completely disable interrupts.
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//
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#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
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#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for SEGGER Embedded Studio,
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* Rowley CrossStudio and GCC
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*/
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#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32))
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#if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__))
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#define SEGGER_RTT_LOCK() { \
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unsigned int _SEGGER_RTT__LockState; \
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__asm volatile ("mrs %0, primask \n\t" \
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"movs r1, #1 \n\t" \
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"msr primask, r1 \n\t" \
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: "=r" (_SEGGER_RTT__LockState) \
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: \
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: "r1", "cc" \
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);
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#define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \
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: \
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: "r" (_SEGGER_RTT__LockState) \
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: \
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); \
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}
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#elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__))
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#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
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#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
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#endif
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#define SEGGER_RTT_LOCK() { \
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unsigned int _SEGGER_RTT__LockState; \
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__asm volatile ("mrs %0, basepri \n\t" \
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"mov r1, %1 \n\t" \
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"msr basepri, r1 \n\t" \
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: "=r" (_SEGGER_RTT__LockState) \
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: "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \
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: "r1", "cc" \
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);
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#define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \
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: \
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: "r" (_SEGGER_RTT__LockState) \
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: \
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); \
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}
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#elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__))
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#define SEGGER_RTT_LOCK() { \
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unsigned int _SEGGER_RTT__LockState; \
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__asm volatile ("mrs r1, CPSR \n\t" \
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"mov %0, r1 \n\t" \
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"orr r1, r1, #0xC0 \n\t" \
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"msr CPSR_c, r1 \n\t" \
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: "=r" (_SEGGER_RTT__LockState) \
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: \
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: "r1", "cc" \
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);
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#define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
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"mrs r1, CPSR \n\t" \
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"bic r1, r1, #0xC0 \n\t" \
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"and r0, r0, #0xC0 \n\t" \
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"orr r1, r1, r0 \n\t" \
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"msr CPSR_c, r1 \n\t" \
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: \
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: "r" (_SEGGER_RTT__LockState) \
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: "r0", "r1", "cc" \
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); \
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}
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#elif defined(__riscv) || defined(__riscv_xlen)
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#define SEGGER_RTT_LOCK() { \
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unsigned int _SEGGER_RTT__LockState; \
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__asm volatile ("csrr %0, mstatus \n\t" \
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"csrci mstatus, 8 \n\t" \
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"andi %0, %0, 8 \n\t" \
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: "=r" (_SEGGER_RTT__LockState) \
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: \
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: \
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);
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#define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \
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"or %0, %0, a1 \n\t" \
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"csrs mstatus, %0 \n\t" \
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: \
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: "r" (_SEGGER_RTT__LockState) \
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: "a1" \
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); \
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}
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#else
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#define SEGGER_RTT_LOCK()
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#define SEGGER_RTT_UNLOCK()
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#endif
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for IAR EWARM
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*/
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#ifdef __ICCARM__
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#if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \
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(defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__))
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#define SEGGER_RTT_LOCK() { \
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unsigned int _SEGGER_RTT__LockState; \
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_SEGGER_RTT__LockState = __get_PRIMASK(); \
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__set_PRIMASK(1);
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#define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \
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}
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#elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \
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(defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \
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(defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \
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(defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__))
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#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
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#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
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#endif
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#define SEGGER_RTT_LOCK() { \
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unsigned int _SEGGER_RTT__LockState; \
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_SEGGER_RTT__LockState = __get_BASEPRI(); \
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__set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
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#define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \
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}
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#elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \
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(defined (__ARM7R__) && (__CORE__ == __ARM7R__))
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#define SEGGER_RTT_LOCK() { \
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unsigned int _SEGGER_RTT__LockState; \
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__asm volatile ("mrs r1, CPSR \n\t" \
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"mov %0, r1 \n\t" \
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"orr r1, r1, #0xC0 \n\t" \
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"msr CPSR_c, r1 \n\t" \
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: "=r" (_SEGGER_RTT__LockState) \
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: \
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: "r1", "cc" \
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);
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#define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
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"mrs r1, CPSR \n\t" \
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"bic r1, r1, #0xC0 \n\t" \
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"and r0, r0, #0xC0 \n\t" \
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"orr r1, r1, r0 \n\t" \
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"msr CPSR_c, r1 \n\t" \
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: \
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: "r" (_SEGGER_RTT__LockState) \
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: "r0", "r1", "cc" \
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); \
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}
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#endif
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for IAR RX
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*/
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#ifdef __ICCRX__
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#define SEGGER_RTT_LOCK() { \
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unsigned long _SEGGER_RTT__LockState; \
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_SEGGER_RTT__LockState = __get_interrupt_state(); \
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__disable_interrupt();
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#define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \
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}
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for IAR RL78
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*/
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#ifdef __ICCRL78__
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#define SEGGER_RTT_LOCK() { \
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__istate_t _SEGGER_RTT__LockState; \
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_SEGGER_RTT__LockState = __get_interrupt_state(); \
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__disable_interrupt();
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#define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \
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}
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for KEIL ARM
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*/
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#ifdef __CC_ARM
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#if (defined __TARGET_ARCH_6S_M)
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#define SEGGER_RTT_LOCK() { \
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unsigned int _SEGGER_RTT__LockState; \
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register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \
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_SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \
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_SEGGER_RTT__PRIMASK = 1u; \
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__schedule_barrier();
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#define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \
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__schedule_barrier(); \
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}
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#elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
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#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
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#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
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#endif
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#define SEGGER_RTT_LOCK() { \
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unsigned int _SEGGER_RTT__LockState; \
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register unsigned char BASEPRI __asm( "basepri"); \
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_SEGGER_RTT__LockState = BASEPRI; \
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BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \
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__schedule_barrier();
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#define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \
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__schedule_barrier(); \
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}
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#endif
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for TI ARM
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*/
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#ifdef __TI_ARM__
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#if defined (__TI_ARM_V6M0__)
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#define SEGGER_RTT_LOCK() { \
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unsigned int _SEGGER_RTT__LockState; \
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_SEGGER_RTT__LockState = __get_PRIMASK(); \
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__set_PRIMASK(1);
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#define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \
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}
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#elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
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#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
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#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
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#endif
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#define SEGGER_RTT_LOCK() { \
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unsigned int _SEGGER_RTT__LockState; \
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_SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
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#define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \
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}
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#endif
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for CCRX
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*/
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#ifdef __RX
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#include <machine.h>
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#define SEGGER_RTT_LOCK() { \
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unsigned long _SEGGER_RTT__LockState; \
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_SEGGER_RTT__LockState = get_psw() & 0x010000; \
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clrpsw_i();
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#define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \
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}
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for embOS Simulation on Windows
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* (Can also be used for generic RTT locking with embOS)
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*/
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#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS)
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void OS_SIM_EnterCriticalSection(void);
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void OS_SIM_LeaveCriticalSection(void);
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#define SEGGER_RTT_LOCK() { \
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OS_SIM_EnterCriticalSection();
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#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \
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}
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#endif
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/*********************************************************************
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*
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* RTT lock configuration fallback
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*/
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#ifndef SEGGER_RTT_LOCK
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#define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts)
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#endif
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#ifndef SEGGER_RTT_UNLOCK
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#define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
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#endif
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#endif
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/*************************** End of file ****************************/
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