更新了CUBEMX配置,添加了所有引脚和外部中断.
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NeoZng
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/**
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******************************************************************************
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* @file stm32f4xx_hal_crc.h
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* @author MCD Application Team
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* @brief Header file of CRC HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32F4xx_HAL_CRC_H
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#define STM32F4xx_HAL_CRC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal_def.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup CRC
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup CRC_Exported_Types CRC Exported Types
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* @{
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*/
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/**
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* @brief CRC HAL State Structure definition
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*/
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typedef enum
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{
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HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */
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HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */
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HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */
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HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */
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HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */
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} HAL_CRC_StateTypeDef;
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/**
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* @brief CRC Handle Structure definition
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*/
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typedef struct
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{
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CRC_TypeDef *Instance; /*!< Register base address */
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HAL_LockTypeDef Lock; /*!< CRC Locking object */
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__IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */
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} CRC_HandleTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup CRC_Exported_Constants CRC Exported Constants
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* @{
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*/
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/**
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* @}
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*/
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/* Exported macros -----------------------------------------------------------*/
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/** @defgroup CRC_Exported_Macros CRC Exported Macros
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* @{
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*/
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/** @brief Reset CRC handle state.
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* @param __HANDLE__ CRC handle.
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* @retval None
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*/
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#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
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/**
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* @brief Reset CRC Data Register.
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* @param __HANDLE__ CRC handle
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* @retval None
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*/
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#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
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/**
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* @brief Store data in the Independent Data (ID) register.
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* @param __HANDLE__ CRC handle
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* @param __VALUE__ Value to be stored in the ID register
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* @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
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* @retval None
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*/
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#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
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/**
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* @brief Return the data stored in the Independent Data (ID) register.
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* @param __HANDLE__ CRC handle
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* @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
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* @retval Value of the ID register
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*/
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#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
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/**
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* @}
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*/
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/* Private macros --------------------------------------------------------*/
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/** @defgroup CRC_Private_Macros CRC Private Macros
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* @{
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*/
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup CRC_Exported_Functions CRC Exported Functions
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* @{
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*/
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/* Initialization and de-initialization functions ****************************/
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/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
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* @{
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*/
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HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
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HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc);
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void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
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void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
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/**
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* @}
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*/
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/* Peripheral Control functions ***********************************************/
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/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
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* @{
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*/
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uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
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uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
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/**
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* @}
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*/
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/* Peripheral State and Error functions ***************************************/
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/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
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* @{
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*/
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HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32F4xx_HAL_CRC_H */
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/**
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******************************************************************************
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* @file stm32f4xx_hal_dac.h
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* @author MCD Application Team
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* @brief Header file of DAC HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32F4xx_HAL_DAC_H
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#define STM32F4xx_HAL_DAC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal_def.h"
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#if defined(DAC)
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/** @addtogroup DAC
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup DAC_Exported_Types DAC Exported Types
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* @{
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*/
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/**
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* @brief HAL State structures definition
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*/
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typedef enum
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{
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HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */
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HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */
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HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */
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HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */
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HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */
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} HAL_DAC_StateTypeDef;
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/**
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* @brief DAC handle Structure definition
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*/
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#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
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typedef struct __DAC_HandleTypeDef
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#else
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typedef struct
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#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
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{
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DAC_TypeDef *Instance; /*!< Register base address */
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__IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
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HAL_LockTypeDef Lock; /*!< DAC locking object */
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DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
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DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
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__IO uint32_t ErrorCode; /*!< DAC Error code */
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#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
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void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
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void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
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void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
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void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
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#if defined(DAC_CHANNEL2_SUPPORT)
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void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
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void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
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void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
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void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef *hdac);
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#endif /* DAC_CHANNEL2_SUPPORT */
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void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac);
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void (* MspDeInitCallback) (struct __DAC_HandleTypeDef *hdac);
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#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
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} DAC_HandleTypeDef;
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/**
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* @brief DAC Configuration regular Channel structure definition
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*/
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typedef struct
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{
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uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
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This parameter can be a value of @ref DAC_trigger_selection */
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uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
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This parameter can be a value of @ref DAC_output_buffer */
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} DAC_ChannelConfTypeDef;
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#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
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/**
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* @brief HAL DAC Callback ID enumeration definition
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*/
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typedef enum
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{
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HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */
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HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */
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HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */
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HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */
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#if defined(DAC_CHANNEL2_SUPPORT)
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HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */
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HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */
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HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */
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HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */
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#endif /* DAC_CHANNEL2_SUPPORT */
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HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */
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HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */
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HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */
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} HAL_DAC_CallbackIDTypeDef;
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/**
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* @brief HAL DAC Callback pointer definition
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*/
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typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
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#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup DAC_Exported_Constants DAC Exported Constants
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* @{
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*/
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/** @defgroup DAC_Error_Code DAC Error Code
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* @{
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*/
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#define HAL_DAC_ERROR_NONE 0x00U /*!< No error */
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#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */
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#if defined(DAC_CHANNEL2_SUPPORT)
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#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */
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#endif /* DAC_CHANNEL2_SUPPORT */
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#define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */
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#define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */
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#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
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#define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */
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#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/** @defgroup DAC_trigger_selection DAC trigger selection
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* @{
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*/
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#define DAC_TRIGGER_NONE 0x00000000UL /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */
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#define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_T4_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_T6_TRGO ( DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */
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#define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_SOFTWARE (DAC_CR_TSEL1 | DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */
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/**
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* @}
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*/
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/** @defgroup DAC_output_buffer DAC output buffer
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* @{
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*/
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#define DAC_OUTPUTBUFFER_ENABLE 0x00000000U
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#define DAC_OUTPUTBUFFER_DISABLE (DAC_CR_BOFF1)
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/**
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* @}
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*/
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/** @defgroup DAC_Channel_selection DAC Channel selection
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* @{
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*/
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#define DAC_CHANNEL_1 0x00000000U
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#if defined(DAC_CHANNEL2_SUPPORT)
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#define DAC_CHANNEL_2 0x00000010U
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#endif /* DAC_CHANNEL2_SUPPORT */
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/**
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* @}
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*/
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/** @defgroup DAC_data_alignment DAC data alignment
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* @{
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*/
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#define DAC_ALIGN_12B_R 0x00000000U
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#define DAC_ALIGN_12B_L 0x00000004U
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#define DAC_ALIGN_8B_R 0x00000008U
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/**
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* @}
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*/
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/** @defgroup DAC_flags_definition DAC flags definition
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* @{
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*/
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#define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1)
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#if defined(DAC_CHANNEL2_SUPPORT)
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#define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2)
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#endif /* DAC_CHANNEL2_SUPPORT */
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/**
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* @}
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*/
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/** @defgroup DAC_IT_definition DAC IT definition
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* @{
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*/
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#define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1)
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#if defined(DAC_CHANNEL2_SUPPORT)
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#define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2)
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#endif /* DAC_CHANNEL2_SUPPORT */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup DAC_Exported_Macros DAC Exported Macros
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* @{
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*/
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/** @brief Reset DAC handle state.
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* @param __HANDLE__ specifies the DAC handle.
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* @retval None
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*/
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#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
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#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \
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(__HANDLE__)->State = HAL_DAC_STATE_RESET; \
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(__HANDLE__)->MspInitCallback = NULL; \
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(__HANDLE__)->MspDeInitCallback = NULL; \
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} while(0)
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#else
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#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
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#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
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/** @brief Enable the DAC channel.
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* @param __HANDLE__ specifies the DAC handle.
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* @param __DAC_Channel__ specifies the DAC channel
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* @retval None
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*/
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#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
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((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
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/** @brief Disable the DAC channel.
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* @param __HANDLE__ specifies the DAC handle
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* @param __DAC_Channel__ specifies the DAC channel.
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* @retval None
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*/
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#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
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((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
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/** @brief Set DHR12R1 alignment.
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* @param __ALIGNMENT__ specifies the DAC alignment
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* @retval None
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*/
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#define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__))
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#if defined(DAC_CHANNEL2_SUPPORT)
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/** @brief Set DHR12R2 alignment.
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* @param __ALIGNMENT__ specifies the DAC alignment
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* @retval None
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*/
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#define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014UL + (__ALIGNMENT__))
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#endif /* DAC_CHANNEL2_SUPPORT */
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/** @brief Set DHR12RD alignment.
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* @param __ALIGNMENT__ specifies the DAC alignment
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* @retval None
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*/
|
||||
#define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__))
|
||||
|
||||
/** @brief Enable the DAC interrupt.
|
||||
* @param __HANDLE__ specifies the DAC handle
|
||||
* @param __INTERRUPT__ specifies the DAC interrupt.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
|
||||
* @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
|
||||
|
||||
/** @brief Disable the DAC interrupt.
|
||||
* @param __HANDLE__ specifies the DAC handle
|
||||
* @param __INTERRUPT__ specifies the DAC interrupt.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
|
||||
* @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
|
||||
|
||||
/** @brief Check whether the specified DAC interrupt source is enabled or not.
|
||||
* @param __HANDLE__ DAC handle
|
||||
* @param __INTERRUPT__ DAC interrupt source to check
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
|
||||
* @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
|
||||
* @retval State of interruption (SET or RESET)
|
||||
*/
|
||||
#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR\
|
||||
& (__INTERRUPT__)) == (__INTERRUPT__))
|
||||
|
||||
/** @brief Get the selected DAC's flag status.
|
||||
* @param __HANDLE__ specifies the DAC handle.
|
||||
* @param __FLAG__ specifies the DAC flag to get.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
|
||||
* @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/** @brief Clear the DAC's flag.
|
||||
* @param __HANDLE__ specifies the DAC handle.
|
||||
* @param __FLAG__ specifies the DAC flag to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
|
||||
* @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DAC_Private_Macros DAC Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
|
||||
((STATE) == DAC_OUTPUTBUFFER_DISABLE))
|
||||
|
||||
#if defined(DAC_CHANNEL2_SUPPORT)
|
||||
#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
|
||||
((CHANNEL) == DAC_CHANNEL_2))
|
||||
#else
|
||||
#define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1)
|
||||
#endif /* DAC_CHANNEL2_SUPPORT */
|
||||
|
||||
#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
|
||||
((ALIGN) == DAC_ALIGN_12B_L) || \
|
||||
((ALIGN) == DAC_ALIGN_8B_R))
|
||||
|
||||
#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include DAC HAL Extended module */
|
||||
#include "stm32f4xx_hal_dac_ex.h"
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup DAC_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup DAC_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac);
|
||||
HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup DAC_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel);
|
||||
HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
|
||||
HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
|
||||
uint32_t Alignment);
|
||||
HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
|
||||
void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac);
|
||||
HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
|
||||
|
||||
void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
|
||||
|
||||
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
|
||||
/* DAC callback registering/unregistering */
|
||||
HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
|
||||
pDAC_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup DAC_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel);
|
||||
HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup DAC_Exported_Functions_Group4
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State and Error functions ***************************************/
|
||||
HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac);
|
||||
uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DAC_Private_Functions DAC Private Functions
|
||||
* @{
|
||||
*/
|
||||
void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
|
||||
void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
|
||||
void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* DAC */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* STM32F4xx_HAL_DAC_H */
|
||||
|
||||
|
|
@ -0,0 +1,205 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_dac_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of DAC HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32F4xx_HAL_DAC_EX_H
|
||||
#define STM32F4xx_HAL_DAC_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal_def.h"
|
||||
|
||||
#if defined(DAC)
|
||||
|
||||
/** @addtogroup DACEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief HAL State structures definition
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DACEx_Exported_Constants DACEx Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DACEx_lfsrunmask_triangleamplitude DACEx lfsrunmask triangle amplitude
|
||||
* @{
|
||||
*/
|
||||
#define DAC_LFSRUNMASK_BIT0 0x00000000UL /*!< Unmask DAC channel LFSR bit0 for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS1_0 ( DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS2_0 ( DAC_CR_MAMP1_1 ) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS3_0 ( DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS4_0 ( DAC_CR_MAMP1_2 ) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS5_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS6_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 ) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS7_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS8_0 (DAC_CR_MAMP1_3 ) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS9_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS10_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 ) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS11_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */
|
||||
#define DAC_TRIANGLEAMPLITUDE_1 0x00000000UL /*!< Select max triangle amplitude of 1 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_3 ( DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_7 ( DAC_CR_MAMP1_1 ) /*!< Select max triangle amplitude of 7 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_15 ( DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_31 ( DAC_CR_MAMP1_2 ) /*!< Select max triangle amplitude of 31 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_63 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_127 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 ) /*!< Select max triangle amplitude of 127 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_255 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_511 (DAC_CR_MAMP1_3 ) /*!< Select max triangle amplitude of 511 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_1023 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_2047 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 ) /*!< Select max triangle amplitude of 2047 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_4095 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DACEx_Private_Macros DACEx Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
|
||||
((TRIGGER) == DAC_TRIGGER_SOFTWARE))
|
||||
|
||||
#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_4095))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/* Extended features functions ***********************************************/
|
||||
|
||||
/** @addtogroup DACEx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup DACEx_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
|
||||
HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude);
|
||||
HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude);
|
||||
|
||||
#if defined(DAC_CHANNEL2_SUPPORT)
|
||||
#endif
|
||||
HAL_StatusTypeDef HAL_DACEx_DualStart(DAC_HandleTypeDef *hdac);
|
||||
HAL_StatusTypeDef HAL_DACEx_DualStop(DAC_HandleTypeDef *hdac);
|
||||
HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2);
|
||||
uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef *hdac);
|
||||
|
||||
#if defined(DAC_CHANNEL2_SUPPORT)
|
||||
#endif
|
||||
void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup DACEx_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
#if defined(DAC_CHANNEL2_SUPPORT)
|
||||
/* DAC_DMAConvCpltCh2 / DAC_DMAErrorCh2 / DAC_DMAHalfConvCpltCh2 */
|
||||
/* are called by HAL_DAC_Start_DMA */
|
||||
void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma);
|
||||
void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma);
|
||||
void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma);
|
||||
#endif /* DAC_CHANNEL2_SUPPORT */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* DAC */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32F4xx_HAL_DAC_EX_H */
|
||||
|
||||
|
|
@ -1,325 +1,325 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of GPIO HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of GPIO HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_GPIO_H
|
||||
#define __STM32F4xx_HAL_GPIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup GPIO
|
||||
* @{
|
||||
*/
|
||||
/** @addtogroup GPIO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup GPIO_Exported_Types GPIO Exported Types
|
||||
* @{
|
||||
*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup GPIO_Exported_Types GPIO Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief GPIO Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
|
||||
This parameter can be any value of @ref GPIO_pins_define */
|
||||
/**
|
||||
* @brief GPIO Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
|
||||
This parameter can be any value of @ref GPIO_pins_define */
|
||||
|
||||
uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_mode_define */
|
||||
uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_mode_define */
|
||||
|
||||
uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_pull_define */
|
||||
uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_pull_define */
|
||||
|
||||
uint32_t Speed; /*!< Specifies the speed for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_speed_define */
|
||||
uint32_t Speed; /*!< Specifies the speed for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_speed_define */
|
||||
|
||||
uint32_t Alternate; /*!< Peripheral to be connected to the selected pins.
|
||||
This parameter can be a value of @ref GPIO_Alternate_function_selection */
|
||||
} GPIO_InitTypeDef;
|
||||
uint32_t Alternate; /*!< Peripheral to be connected to the selected pins.
|
||||
This parameter can be a value of @ref GPIO_Alternate_function_selection */
|
||||
}GPIO_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief GPIO Bit SET and Bit RESET enumeration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_PIN_RESET = 0,
|
||||
GPIO_PIN_SET
|
||||
} GPIO_PinState;
|
||||
/**
|
||||
* @brief GPIO Bit SET and Bit RESET enumeration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_PIN_RESET = 0,
|
||||
GPIO_PIN_SET
|
||||
}GPIO_PinState;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Constants GPIO Exported Constants
|
||||
* @{
|
||||
*/
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_pins_define GPIO pins define
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
|
||||
#define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
|
||||
#define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
|
||||
#define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
|
||||
#define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
|
||||
#define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
|
||||
#define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
|
||||
#define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
|
||||
#define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
|
||||
#define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
|
||||
#define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
|
||||
#define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
|
||||
#define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
|
||||
#define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
|
||||
#define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
|
||||
#define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
|
||||
#define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
|
||||
#define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
|
||||
#define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
|
||||
#define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
|
||||
#define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
|
||||
#define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
|
||||
#define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
|
||||
#define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
|
||||
#define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
|
||||
#define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
|
||||
#define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
|
||||
#define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
|
||||
#define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
|
||||
#define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
|
||||
#define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
|
||||
#define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
|
||||
#define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
|
||||
|
||||
#define GPIO_PIN_MASK 0x0000FFFFU /* PIN mask for assert test */
|
||||
#define GPIO_PIN_MASK 0x0000FFFFU /* PIN mask for assert test */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_mode_define GPIO mode define
|
||||
* @brief GPIO Configuration Mode
|
||||
* Elements values convention: 0x00WX00YZ
|
||||
* - W : EXTI trigger detection on 3 bits
|
||||
* - X : EXTI mode (IT or Event) on 2 bits
|
||||
* - Y : Output type (Push Pull or Open Drain) on 1 bit
|
||||
* - Z : GPIO mode (Input, Output, Alternate or Analog) on 2 bits
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_MODE_INPUT MODE_INPUT /*!< Input Floating Mode */
|
||||
#define GPIO_MODE_OUTPUT_PP (MODE_OUTPUT | OUTPUT_PP) /*!< Output Push Pull Mode */
|
||||
#define GPIO_MODE_OUTPUT_OD (MODE_OUTPUT | OUTPUT_OD) /*!< Output Open Drain Mode */
|
||||
#define GPIO_MODE_AF_PP (MODE_AF | OUTPUT_PP) /*!< Alternate Function Push Pull Mode */
|
||||
#define GPIO_MODE_AF_OD (MODE_AF | OUTPUT_OD) /*!< Alternate Function Open Drain Mode */
|
||||
* @brief GPIO Configuration Mode
|
||||
* Elements values convention: 0x00WX00YZ
|
||||
* - W : EXTI trigger detection on 3 bits
|
||||
* - X : EXTI mode (IT or Event) on 2 bits
|
||||
* - Y : Output type (Push Pull or Open Drain) on 1 bit
|
||||
* - Z : GPIO mode (Input, Output, Alternate or Analog) on 2 bits
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_MODE_INPUT MODE_INPUT /*!< Input Floating Mode */
|
||||
#define GPIO_MODE_OUTPUT_PP (MODE_OUTPUT | OUTPUT_PP) /*!< Output Push Pull Mode */
|
||||
#define GPIO_MODE_OUTPUT_OD (MODE_OUTPUT | OUTPUT_OD) /*!< Output Open Drain Mode */
|
||||
#define GPIO_MODE_AF_PP (MODE_AF | OUTPUT_PP) /*!< Alternate Function Push Pull Mode */
|
||||
#define GPIO_MODE_AF_OD (MODE_AF | OUTPUT_OD) /*!< Alternate Function Open Drain Mode */
|
||||
|
||||
#define GPIO_MODE_ANALOG MODE_ANALOG /*!< Analog Mode */
|
||||
|
||||
#define GPIO_MODE_IT_RISING (MODE_INPUT | EXTI_IT | TRIGGER_RISING) /*!< External Interrupt Mode with Rising edge trigger detection */
|
||||
#define GPIO_MODE_IT_FALLING (MODE_INPUT | EXTI_IT | TRIGGER_FALLING) /*!< External Interrupt Mode with Falling edge trigger detection */
|
||||
#define GPIO_MODE_IT_RISING_FALLING (MODE_INPUT | EXTI_IT | TRIGGER_RISING | TRIGGER_FALLING) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
|
||||
|
||||
#define GPIO_MODE_EVT_RISING (MODE_INPUT | EXTI_EVT | TRIGGER_RISING) /*!< External Event Mode with Rising edge trigger detection */
|
||||
#define GPIO_MODE_EVT_FALLING (MODE_INPUT | EXTI_EVT | TRIGGER_FALLING) /*!< External Event Mode with Falling edge trigger detection */
|
||||
#define GPIO_MODE_EVT_RISING_FALLING (MODE_INPUT | EXTI_EVT | TRIGGER_RISING | TRIGGER_FALLING) /*!< External Event Mode with Rising/Falling edge trigger detection */
|
||||
#define GPIO_MODE_ANALOG MODE_ANALOG /*!< Analog Mode */
|
||||
|
||||
#define GPIO_MODE_IT_RISING (MODE_INPUT | EXTI_IT | TRIGGER_RISING) /*!< External Interrupt Mode with Rising edge trigger detection */
|
||||
#define GPIO_MODE_IT_FALLING (MODE_INPUT | EXTI_IT | TRIGGER_FALLING) /*!< External Interrupt Mode with Falling edge trigger detection */
|
||||
#define GPIO_MODE_IT_RISING_FALLING (MODE_INPUT | EXTI_IT | TRIGGER_RISING | TRIGGER_FALLING) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
|
||||
|
||||
#define GPIO_MODE_EVT_RISING (MODE_INPUT | EXTI_EVT | TRIGGER_RISING) /*!< External Event Mode with Rising edge trigger detection */
|
||||
#define GPIO_MODE_EVT_FALLING (MODE_INPUT | EXTI_EVT | TRIGGER_FALLING) /*!< External Event Mode with Falling edge trigger detection */
|
||||
#define GPIO_MODE_EVT_RISING_FALLING (MODE_INPUT | EXTI_EVT | TRIGGER_RISING | TRIGGER_FALLING) /*!< External Event Mode with Rising/Falling edge trigger detection */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_speed_define GPIO speed define
|
||||
* @brief GPIO Output Maximum frequency
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_SPEED_FREQ_LOW 0x00000000U /*!< IO works at 2 MHz, please refer to the product datasheet */
|
||||
#define GPIO_SPEED_FREQ_MEDIUM 0x00000001U /*!< range 12,5 MHz to 50 MHz, please refer to the product datasheet */
|
||||
#define GPIO_SPEED_FREQ_HIGH 0x00000002U /*!< range 25 MHz to 100 MHz, please refer to the product datasheet */
|
||||
#define GPIO_SPEED_FREQ_VERY_HIGH 0x00000003U /*!< range 50 MHz to 200 MHz, please refer to the product datasheet */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
* @brief GPIO Output Maximum frequency
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_SPEED_FREQ_LOW 0x00000000U /*!< IO works at 2 MHz, please refer to the product datasheet */
|
||||
#define GPIO_SPEED_FREQ_MEDIUM 0x00000001U /*!< range 12,5 MHz to 50 MHz, please refer to the product datasheet */
|
||||
#define GPIO_SPEED_FREQ_HIGH 0x00000002U /*!< range 25 MHz to 100 MHz, please refer to the product datasheet */
|
||||
#define GPIO_SPEED_FREQ_VERY_HIGH 0x00000003U /*!< range 50 MHz to 200 MHz, please refer to the product datasheet */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_pull_define GPIO pull define
|
||||
/** @defgroup GPIO_pull_define GPIO pull define
|
||||
* @brief GPIO Pull-Up or Pull-Down Activation
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_NOPULL 0x00000000U /*!< No Pull-up or Pull-down activation */
|
||||
#define GPIO_PULLUP 0x00000001U /*!< Pull-up activation */
|
||||
#define GPIO_PULLDOWN 0x00000002U /*!< Pull-down activation */
|
||||
*/
|
||||
#define GPIO_NOPULL 0x00000000U /*!< No Pull-up or Pull-down activation */
|
||||
#define GPIO_PULLUP 0x00000001U /*!< Pull-up activation */
|
||||
#define GPIO_PULLDOWN 0x00000002U /*!< Pull-down activation */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup GPIO_Exported_Macros GPIO Exported Macros
|
||||
* @{
|
||||
*/
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified EXTI line flag is set or not.
|
||||
* @param __EXTI_LINE__ specifies the EXTI line flag to check.
|
||||
* This parameter can be GPIO_PIN_x where x can be(0..15)
|
||||
* @retval The new state of __EXTI_LINE__ (SET or RESET).
|
||||
*/
|
||||
* @brief Checks whether the specified EXTI line flag is set or not.
|
||||
* @param __EXTI_LINE__ specifies the EXTI line flag to check.
|
||||
* This parameter can be GPIO_PIN_x where x can be(0..15)
|
||||
* @retval The new state of __EXTI_LINE__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
|
||||
|
||||
/**
|
||||
* @brief Clears the EXTI's line pending flags.
|
||||
* @param __EXTI_LINE__ specifies the EXTI lines flags to clear.
|
||||
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
|
||||
* @retval None
|
||||
*/
|
||||
* @brief Clears the EXTI's line pending flags.
|
||||
* @param __EXTI_LINE__ specifies the EXTI lines flags to clear.
|
||||
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified EXTI line is asserted or not.
|
||||
* @param __EXTI_LINE__ specifies the EXTI line to check.
|
||||
* This parameter can be GPIO_PIN_x where x can be(0..15)
|
||||
* @retval The new state of __EXTI_LINE__ (SET or RESET).
|
||||
*/
|
||||
* @brief Checks whether the specified EXTI line is asserted or not.
|
||||
* @param __EXTI_LINE__ specifies the EXTI line to check.
|
||||
* This parameter can be GPIO_PIN_x where x can be(0..15)
|
||||
* @retval The new state of __EXTI_LINE__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
|
||||
|
||||
/**
|
||||
* @brief Clears the EXTI's line pending bits.
|
||||
* @param __EXTI_LINE__ specifies the EXTI lines to clear.
|
||||
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
|
||||
* @retval None
|
||||
*/
|
||||
* @brief Clears the EXTI's line pending bits.
|
||||
* @param __EXTI_LINE__ specifies the EXTI lines to clear.
|
||||
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
|
||||
|
||||
/**
|
||||
* @brief Generates a Software interrupt on selected EXTI line.
|
||||
* @param __EXTI_LINE__ specifies the EXTI line to check.
|
||||
* This parameter can be GPIO_PIN_x where x can be(0..15)
|
||||
* @retval None
|
||||
*/
|
||||
* @brief Generates a Software interrupt on selected EXTI line.
|
||||
* @param __EXTI_LINE__ specifies the EXTI line to check.
|
||||
* This parameter can be GPIO_PIN_x where x can be(0..15)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include GPIO HAL Extension module */
|
||||
#include "stm32f4xx_hal_gpio_ex.h"
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup GPIO_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup GPIO_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup GPIO_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
|
||||
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @addtogroup GPIO_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
|
||||
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup GPIO_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
|
||||
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
|
||||
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
|
||||
/** @addtogroup GPIO_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
|
||||
void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
* @}
|
||||
*/
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup GPIO_Private_Constants GPIO Private Constants
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_MODE_Pos 0U
|
||||
#define GPIO_MODE (0x3UL << GPIO_MODE_Pos)
|
||||
#define MODE_INPUT (0x0UL << GPIO_MODE_Pos)
|
||||
#define MODE_OUTPUT (0x1UL << GPIO_MODE_Pos)
|
||||
#define MODE_AF (0x2UL << GPIO_MODE_Pos)
|
||||
#define MODE_ANALOG (0x3UL << GPIO_MODE_Pos)
|
||||
#define OUTPUT_TYPE_Pos 4U
|
||||
#define OUTPUT_TYPE (0x1UL << OUTPUT_TYPE_Pos)
|
||||
#define OUTPUT_PP (0x0UL << OUTPUT_TYPE_Pos)
|
||||
#define OUTPUT_OD (0x1UL << OUTPUT_TYPE_Pos)
|
||||
#define EXTI_MODE_Pos 16U
|
||||
#define EXTI_MODE (0x3UL << EXTI_MODE_Pos)
|
||||
#define EXTI_IT (0x1UL << EXTI_MODE_Pos)
|
||||
#define EXTI_EVT (0x2UL << EXTI_MODE_Pos)
|
||||
#define TRIGGER_MODE_Pos 20U
|
||||
#define TRIGGER_MODE (0x7UL << TRIGGER_MODE_Pos)
|
||||
#define TRIGGER_RISING (0x1UL << TRIGGER_MODE_Pos)
|
||||
#define TRIGGER_FALLING (0x2UL << TRIGGER_MODE_Pos)
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_MODE_Pos 0U
|
||||
#define GPIO_MODE (0x3UL << GPIO_MODE_Pos)
|
||||
#define MODE_INPUT (0x0UL << GPIO_MODE_Pos)
|
||||
#define MODE_OUTPUT (0x1UL << GPIO_MODE_Pos)
|
||||
#define MODE_AF (0x2UL << GPIO_MODE_Pos)
|
||||
#define MODE_ANALOG (0x3UL << GPIO_MODE_Pos)
|
||||
#define OUTPUT_TYPE_Pos 4U
|
||||
#define OUTPUT_TYPE (0x1UL << OUTPUT_TYPE_Pos)
|
||||
#define OUTPUT_PP (0x0UL << OUTPUT_TYPE_Pos)
|
||||
#define OUTPUT_OD (0x1UL << OUTPUT_TYPE_Pos)
|
||||
#define EXTI_MODE_Pos 16U
|
||||
#define EXTI_MODE (0x3UL << EXTI_MODE_Pos)
|
||||
#define EXTI_IT (0x1UL << EXTI_MODE_Pos)
|
||||
#define EXTI_EVT (0x2UL << EXTI_MODE_Pos)
|
||||
#define TRIGGER_MODE_Pos 20U
|
||||
#define TRIGGER_MODE (0x7UL << TRIGGER_MODE_Pos)
|
||||
#define TRIGGER_RISING (0x1UL << TRIGGER_MODE_Pos)
|
||||
#define TRIGGER_FALLING (0x2UL << TRIGGER_MODE_Pos)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup GPIO_Private_Macros GPIO Private Macros
|
||||
* @{
|
||||
*/
|
||||
* @{
|
||||
*/
|
||||
#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
|
||||
#define IS_GPIO_PIN(PIN) (((((uint32_t)PIN) & GPIO_PIN_MASK) != 0x00U) && ((((uint32_t)PIN) & ~GPIO_PIN_MASK) == 0x00U))
|
||||
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) || \
|
||||
((MODE) == GPIO_MODE_OUTPUT_PP) || \
|
||||
((MODE) == GPIO_MODE_OUTPUT_OD) || \
|
||||
((MODE) == GPIO_MODE_AF_PP) || \
|
||||
((MODE) == GPIO_MODE_AF_OD) || \
|
||||
((MODE) == GPIO_MODE_IT_RISING) || \
|
||||
((MODE) == GPIO_MODE_IT_FALLING) || \
|
||||
((MODE) == GPIO_MODE_IT_RISING_FALLING) || \
|
||||
((MODE) == GPIO_MODE_EVT_RISING) || \
|
||||
((MODE) == GPIO_MODE_EVT_FALLING) || \
|
||||
((MODE) == GPIO_MODE_EVT_RISING_FALLING) || \
|
||||
#define IS_GPIO_PIN(PIN) (((((uint32_t)PIN) & GPIO_PIN_MASK ) != 0x00U) && ((((uint32_t)PIN) & ~GPIO_PIN_MASK) == 0x00U))
|
||||
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\
|
||||
((MODE) == GPIO_MODE_OUTPUT_PP) ||\
|
||||
((MODE) == GPIO_MODE_OUTPUT_OD) ||\
|
||||
((MODE) == GPIO_MODE_AF_PP) ||\
|
||||
((MODE) == GPIO_MODE_AF_OD) ||\
|
||||
((MODE) == GPIO_MODE_IT_RISING) ||\
|
||||
((MODE) == GPIO_MODE_IT_FALLING) ||\
|
||||
((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
|
||||
((MODE) == GPIO_MODE_EVT_RISING) ||\
|
||||
((MODE) == GPIO_MODE_EVT_FALLING) ||\
|
||||
((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\
|
||||
((MODE) == GPIO_MODE_ANALOG))
|
||||
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || ((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || \
|
||||
((SPEED_LOOP) == GPIO_SPEED_FREQ_HIGH) || ((SPEED_LOOP) == GPIO_SPEED_FREQ_VERY_HIGH))
|
||||
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || ((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || \
|
||||
((SPEED) == GPIO_SPEED_FREQ_HIGH) || ((SPEED) == GPIO_SPEED_FREQ_VERY_HIGH))
|
||||
#define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \
|
||||
((PULL) == GPIO_PULLDOWN))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup GPIO_Private_Functions GPIO Private Functions
|
||||
* @{
|
||||
*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup GPIO_Private_Functions GPIO Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_HAL_GPIO_H */
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,201 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_ll_crc.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of CRC LL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32F4xx_LL_CRC_H
|
||||
#define STM32F4xx_LL_CRC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_LL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(CRC)
|
||||
|
||||
/** @defgroup CRC_LL CRC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup CRC_LL_Exported_Constants CRC Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup CRC_LL_Exported_Macros CRC Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Write a value in CRC register
|
||||
* @param __INSTANCE__ CRC Instance
|
||||
* @param __REG__ Register to be written
|
||||
* @param __VALUE__ Value to be written in the register
|
||||
* @retval None
|
||||
*/
|
||||
#define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, __VALUE__)
|
||||
|
||||
/**
|
||||
* @brief Read a value in CRC register
|
||||
* @param __INSTANCE__ CRC Instance
|
||||
* @param __REG__ Register to be read
|
||||
* @retval Register value
|
||||
*/
|
||||
#define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup CRC_LL_Exported_Functions CRC Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_LL_EF_Configuration CRC Configuration functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Reset the CRC calculation unit.
|
||||
* @note If Programmable Initial CRC value feature
|
||||
* is available, also set the Data Register to the value stored in the
|
||||
* CRC_INIT register, otherwise, reset Data Register to its default value.
|
||||
* @rmtoll CR RESET LL_CRC_ResetCRCCalculationUnit
|
||||
* @param CRCx CRC Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx)
|
||||
{
|
||||
SET_BIT(CRCx->CR, CRC_CR_RESET);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_LL_EF_Data_Management Data_Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Write given 32-bit data to the CRC calculator
|
||||
* @rmtoll DR DR LL_CRC_FeedData32
|
||||
* @param CRCx CRC Instance
|
||||
* @param InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData)
|
||||
{
|
||||
WRITE_REG(CRCx->DR, InData);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return current CRC calculation result. 32 bits value is returned.
|
||||
* @rmtoll DR DR LL_CRC_ReadData32
|
||||
* @param CRCx CRC Instance
|
||||
* @retval Current CRC calculation result as stored in CRC_DR register (32 bits).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx)
|
||||
{
|
||||
return (uint32_t)(READ_REG(CRCx->DR));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return data stored in the Independent Data(IDR) register.
|
||||
* @note This register can be used as a temporary storage location for one byte.
|
||||
* @rmtoll IDR IDR LL_CRC_Read_IDR
|
||||
* @param CRCx CRC Instance
|
||||
* @retval Value stored in CRC_IDR register (General-purpose 8-bit data register).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx)
|
||||
{
|
||||
return (uint32_t)(READ_REG(CRCx->IDR));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Store data in the Independent Data(IDR) register.
|
||||
* @note This register can be used as a temporary storage location for one byte.
|
||||
* @rmtoll IDR IDR LL_CRC_Write_IDR
|
||||
* @param CRCx CRC Instance
|
||||
* @param InData value to be stored in CRC_IDR register (8-bit) between Min_Data=0 and Max_Data=0xFF
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData)
|
||||
{
|
||||
*((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData;
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined(USE_FULL_LL_DRIVER)
|
||||
/** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* USE_FULL_LL_DRIVER */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* defined(CRC) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32F4xx_LL_CRC_H */
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,328 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_crc.c
|
||||
* @author MCD Application Team
|
||||
* @brief CRC HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Cyclic Redundancy Check (CRC) peripheral:
|
||||
* + Initialization and de-initialization functions
|
||||
* + Peripheral Control functions
|
||||
* + Peripheral State functions
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### How to use this driver #####
|
||||
===============================================================================
|
||||
[..]
|
||||
(+) Enable CRC AHB clock using __HAL_RCC_CRC_CLK_ENABLE();
|
||||
(+) Initialize CRC calculator
|
||||
(++) specify generating polynomial (peripheral default or non-default one)
|
||||
(++) specify initialization value (peripheral default or non-default one)
|
||||
(++) specify input data format
|
||||
(++) specify input or output data inversion mode if any
|
||||
(+) Use HAL_CRC_Accumulate() function to compute the CRC value of the
|
||||
input data buffer starting with the previously computed CRC as
|
||||
initialization value
|
||||
(+) Use HAL_CRC_Calculate() function to compute the CRC value of the
|
||||
input data buffer starting with the defined initialization value
|
||||
(default or non-default) to initiate CRC calculation
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CRC CRC
|
||||
* @brief CRC HAL module driver.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup CRC_Exported_Functions CRC Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @brief Initialization and Configuration functions.
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Initialization and de-initialization functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Initialize the CRC according to the specified parameters
|
||||
in the CRC_InitTypeDef and create the associated handle
|
||||
(+) DeInitialize the CRC peripheral
|
||||
(+) Initialize the CRC MSP (MCU Specific Package)
|
||||
(+) DeInitialize the CRC MSP
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initialize the CRC according to the specified
|
||||
* parameters in the CRC_InitTypeDef and create the associated handle.
|
||||
* @param hcrc CRC handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
|
||||
{
|
||||
/* Check the CRC handle allocation */
|
||||
if (hcrc == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
|
||||
|
||||
if (hcrc->State == HAL_CRC_STATE_RESET)
|
||||
{
|
||||
/* Allocate lock resource and initialize it */
|
||||
hcrc->Lock = HAL_UNLOCKED;
|
||||
/* Init the low level hardware */
|
||||
HAL_CRC_MspInit(hcrc);
|
||||
}
|
||||
|
||||
/* Change CRC peripheral state */
|
||||
hcrc->State = HAL_CRC_STATE_READY;
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitialize the CRC peripheral.
|
||||
* @param hcrc CRC handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
|
||||
{
|
||||
/* Check the CRC handle allocation */
|
||||
if (hcrc == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
|
||||
|
||||
/* Check the CRC peripheral state */
|
||||
if (hcrc->State == HAL_CRC_STATE_BUSY)
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
|
||||
/* Change CRC peripheral state */
|
||||
hcrc->State = HAL_CRC_STATE_BUSY;
|
||||
|
||||
/* Reset CRC calculation unit */
|
||||
__HAL_CRC_DR_RESET(hcrc);
|
||||
|
||||
/* Reset IDR register content */
|
||||
CLEAR_BIT(hcrc->Instance->IDR, CRC_IDR_IDR);
|
||||
|
||||
/* DeInit the low level hardware */
|
||||
HAL_CRC_MspDeInit(hcrc);
|
||||
|
||||
/* Change CRC peripheral state */
|
||||
hcrc->State = HAL_CRC_STATE_RESET;
|
||||
|
||||
/* Process unlocked */
|
||||
__HAL_UNLOCK(hcrc);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the CRC MSP.
|
||||
* @param hcrc CRC handle
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hcrc);
|
||||
|
||||
/* NOTE : This function should not be modified, when the callback is needed,
|
||||
the HAL_CRC_MspInit can be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitialize the CRC MSP.
|
||||
* @param hcrc CRC handle
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hcrc);
|
||||
|
||||
/* NOTE : This function should not be modified, when the callback is needed,
|
||||
the HAL_CRC_MspDeInit can be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
|
||||
* @brief management functions.
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Peripheral Control functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) compute the 32-bit CRC value of a 32-bit data buffer
|
||||
using combination of the previous CRC value and the new one.
|
||||
|
||||
[..] or
|
||||
|
||||
(+) compute the 32-bit CRC value of a 32-bit data buffer
|
||||
independently of the previous CRC value.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Compute the 32-bit CRC value of a 32-bit data buffer
|
||||
* starting with the previously computed CRC as initialization value.
|
||||
* @param hcrc CRC handle
|
||||
* @param pBuffer pointer to the input data buffer.
|
||||
* @param BufferLength input data buffer length (number of uint32_t words).
|
||||
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
|
||||
*/
|
||||
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
|
||||
{
|
||||
uint32_t index; /* CRC input data buffer index */
|
||||
uint32_t temp = 0U; /* CRC output (read from hcrc->Instance->DR register) */
|
||||
|
||||
/* Change CRC peripheral state */
|
||||
hcrc->State = HAL_CRC_STATE_BUSY;
|
||||
|
||||
/* Enter Data to the CRC calculator */
|
||||
for (index = 0U; index < BufferLength; index++)
|
||||
{
|
||||
hcrc->Instance->DR = pBuffer[index];
|
||||
}
|
||||
temp = hcrc->Instance->DR;
|
||||
|
||||
/* Change CRC peripheral state */
|
||||
hcrc->State = HAL_CRC_STATE_READY;
|
||||
|
||||
/* Return the CRC computed value */
|
||||
return temp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Compute the 32-bit CRC value of a 32-bit data buffer
|
||||
* starting with hcrc->Instance->INIT as initialization value.
|
||||
* @param hcrc CRC handle
|
||||
* @param pBuffer pointer to the input data buffer.
|
||||
* @param BufferLength input data buffer length (number of uint32_t words).
|
||||
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
|
||||
*/
|
||||
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
|
||||
{
|
||||
uint32_t index; /* CRC input data buffer index */
|
||||
uint32_t temp = 0U; /* CRC output (read from hcrc->Instance->DR register) */
|
||||
|
||||
/* Change CRC peripheral state */
|
||||
hcrc->State = HAL_CRC_STATE_BUSY;
|
||||
|
||||
/* Reset CRC Calculation Unit (hcrc->Instance->INIT is
|
||||
* written in hcrc->Instance->DR) */
|
||||
__HAL_CRC_DR_RESET(hcrc);
|
||||
|
||||
/* Enter 32-bit input data to the CRC calculator */
|
||||
for (index = 0U; index < BufferLength; index++)
|
||||
{
|
||||
hcrc->Instance->DR = pBuffer[index];
|
||||
}
|
||||
temp = hcrc->Instance->DR;
|
||||
|
||||
/* Change CRC peripheral state */
|
||||
hcrc->State = HAL_CRC_STATE_READY;
|
||||
|
||||
/* Return the CRC computed value */
|
||||
return temp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
|
||||
* @brief Peripheral State functions.
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Peripheral State functions #####
|
||||
===============================================================================
|
||||
[..]
|
||||
This subsection permits to get in run-time the status of the peripheral.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Return the CRC handle state.
|
||||
* @param hcrc CRC handle
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc)
|
||||
{
|
||||
/* Return CRC handle state */
|
||||
return hcrc->State;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,495 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_dac_ex.c
|
||||
* @author MCD Application Team
|
||||
* @brief Extended DAC HAL module driver.
|
||||
* This file provides firmware functions to manage the extended
|
||||
* functionalities of the DAC peripheral.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
|
||||
*** Dual mode IO operation ***
|
||||
==============================
|
||||
[..]
|
||||
(+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) :
|
||||
Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
|
||||
HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in
|
||||
Channel 1 and Channel 2.
|
||||
|
||||
*** Signal generation operation ***
|
||||
===================================
|
||||
[..]
|
||||
(+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
|
||||
(+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
|
||||
#if defined(DAC)
|
||||
|
||||
/** @defgroup DACEx DACEx
|
||||
* @brief DAC Extended HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DACEx_Exported_Functions DACEx Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DACEx_Exported_Functions_Group2 IO operation functions
|
||||
* @brief Extended IO operation functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### Extended features functions #####
|
||||
==============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Start conversion.
|
||||
(+) Stop conversion.
|
||||
(+) Start conversion and enable DMA transfer.
|
||||
(+) Stop conversion and disable DMA transfer.
|
||||
(+) Get result of conversion.
|
||||
(+) Get result of dual mode conversion.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(DAC_CHANNEL2_SUPPORT)
|
||||
/**
|
||||
* @brief Enables DAC and starts conversion of both channels.
|
||||
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DAC.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DACEx_DualStart(DAC_HandleTypeDef *hdac)
|
||||
{
|
||||
uint32_t tmp_swtrig = 0UL;
|
||||
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hdac);
|
||||
|
||||
/* Change DAC state */
|
||||
hdac->State = HAL_DAC_STATE_BUSY;
|
||||
|
||||
/* Enable the Peripheral */
|
||||
__HAL_DAC_ENABLE(hdac, DAC_CHANNEL_1);
|
||||
__HAL_DAC_ENABLE(hdac, DAC_CHANNEL_2);
|
||||
|
||||
/* Check if software trigger enabled */
|
||||
if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
|
||||
{
|
||||
tmp_swtrig |= DAC_SWTRIGR_SWTRIG1;
|
||||
}
|
||||
if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (DAC_CHANNEL_2 & 0x10UL)))
|
||||
{
|
||||
tmp_swtrig |= DAC_SWTRIGR_SWTRIG2;
|
||||
}
|
||||
/* Enable the selected DAC software conversion*/
|
||||
SET_BIT(hdac->Instance->SWTRIGR, tmp_swtrig);
|
||||
|
||||
/* Change DAC state */
|
||||
hdac->State = HAL_DAC_STATE_READY;
|
||||
|
||||
/* Process unlocked */
|
||||
__HAL_UNLOCK(hdac);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disables DAC and stop conversion of both channels.
|
||||
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DAC.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DACEx_DualStop(DAC_HandleTypeDef *hdac)
|
||||
{
|
||||
|
||||
/* Disable the Peripheral */
|
||||
__HAL_DAC_DISABLE(hdac, DAC_CHANNEL_1);
|
||||
__HAL_DAC_DISABLE(hdac, DAC_CHANNEL_2);
|
||||
|
||||
/* Change DAC state */
|
||||
hdac->State = HAL_DAC_STATE_READY;
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
#endif /* DAC_CHANNEL2_SUPPORT */
|
||||
|
||||
/**
|
||||
* @brief Enable or disable the selected DAC channel wave generation.
|
||||
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DAC.
|
||||
* @param Channel The selected DAC channel.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg DAC_CHANNEL_1: DAC Channel1 selected
|
||||
* @arg DAC_CHANNEL_2: DAC Channel2 selected
|
||||
* @param Amplitude Select max triangle amplitude.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
|
||||
* @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DAC_CHANNEL(Channel));
|
||||
assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hdac);
|
||||
|
||||
/* Change DAC state */
|
||||
hdac->State = HAL_DAC_STATE_BUSY;
|
||||
|
||||
/* Enable the triangle wave generation for the selected DAC channel */
|
||||
MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL),
|
||||
(DAC_CR_WAVE1_1 | Amplitude) << (Channel & 0x10UL));
|
||||
|
||||
/* Change DAC state */
|
||||
hdac->State = HAL_DAC_STATE_READY;
|
||||
|
||||
/* Process unlocked */
|
||||
__HAL_UNLOCK(hdac);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable or disable the selected DAC channel wave generation.
|
||||
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DAC.
|
||||
* @param Channel The selected DAC channel.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg DAC_CHANNEL_1: DAC Channel1 selected
|
||||
* @arg DAC_CHANNEL_2: DAC Channel2 selected
|
||||
* @param Amplitude Unmask DAC channel LFSR for noise wave generation.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
|
||||
* @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
|
||||
* @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
|
||||
* @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
|
||||
* @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
|
||||
* @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
|
||||
* @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
|
||||
* @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
|
||||
* @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
|
||||
* @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
|
||||
* @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
|
||||
* @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DAC_CHANNEL(Channel));
|
||||
assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hdac);
|
||||
|
||||
/* Change DAC state */
|
||||
hdac->State = HAL_DAC_STATE_BUSY;
|
||||
|
||||
/* Enable the noise wave generation for the selected DAC channel */
|
||||
MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL),
|
||||
(DAC_CR_WAVE1_0 | Amplitude) << (Channel & 0x10UL));
|
||||
|
||||
/* Change DAC state */
|
||||
hdac->State = HAL_DAC_STATE_READY;
|
||||
|
||||
/* Process unlocked */
|
||||
__HAL_UNLOCK(hdac);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
#if defined(DAC_CHANNEL2_SUPPORT)
|
||||
/**
|
||||
* @brief Set the specified data holding register value for dual DAC channel.
|
||||
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DAC.
|
||||
* @param Alignment Specifies the data alignment for dual channel DAC.
|
||||
* This parameter can be one of the following values:
|
||||
* DAC_ALIGN_8B_R: 8bit right data alignment selected
|
||||
* DAC_ALIGN_12B_L: 12bit left data alignment selected
|
||||
* DAC_ALIGN_12B_R: 12bit right data alignment selected
|
||||
* @param Data1 Data for DAC Channel1 to be loaded in the selected data holding register.
|
||||
* @param Data2 Data for DAC Channel2 to be loaded in the selected data holding register.
|
||||
* @note In dual mode, a unique register access is required to write in both
|
||||
* DAC channels at the same time.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
|
||||
{
|
||||
uint32_t data;
|
||||
uint32_t tmp;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DAC_ALIGN(Alignment));
|
||||
assert_param(IS_DAC_DATA(Data1));
|
||||
assert_param(IS_DAC_DATA(Data2));
|
||||
|
||||
/* Calculate and set dual DAC data holding register value */
|
||||
if (Alignment == DAC_ALIGN_8B_R)
|
||||
{
|
||||
data = ((uint32_t)Data2 << 8U) | Data1;
|
||||
}
|
||||
else
|
||||
{
|
||||
data = ((uint32_t)Data2 << 16U) | Data1;
|
||||
}
|
||||
|
||||
tmp = (uint32_t)hdac->Instance;
|
||||
tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
|
||||
|
||||
/* Set the dual DAC selected data holding register */
|
||||
*(__IO uint32_t *)tmp = data;
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Conversion complete callback in non-blocking mode for Channel2.
|
||||
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DAC.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef *hdac)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hdac);
|
||||
|
||||
/* NOTE : This function should not be modified, when the callback is needed,
|
||||
the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Conversion half DMA transfer callback in non-blocking mode for Channel2.
|
||||
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DAC.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef *hdac)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hdac);
|
||||
|
||||
/* NOTE : This function should not be modified, when the callback is needed,
|
||||
the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Error DAC callback for Channel2.
|
||||
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DAC.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hdac);
|
||||
|
||||
/* NOTE : This function should not be modified, when the callback is needed,
|
||||
the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA underrun DAC callback for Channel2.
|
||||
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DAC.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hdac);
|
||||
|
||||
/* NOTE : This function should not be modified, when the callback is needed,
|
||||
the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
#endif /* DAC_CHANNEL2_SUPPORT */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DACEx_Exported_Functions_Group3 Peripheral Control functions
|
||||
* @brief Extended Peripheral Control functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### Peripheral Control functions #####
|
||||
==============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Set the specified data holding register value for DAC channel.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(DAC_CHANNEL2_SUPPORT)
|
||||
/**
|
||||
* @brief Return the last data output value of the selected DAC channel.
|
||||
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DAC.
|
||||
* @retval The selected DAC channel data output value.
|
||||
*/
|
||||
uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef *hdac)
|
||||
{
|
||||
uint32_t tmp = 0UL;
|
||||
|
||||
tmp |= hdac->Instance->DOR1;
|
||||
|
||||
tmp |= hdac->Instance->DOR2 << 16UL;
|
||||
|
||||
/* Returns the DAC channel data output register value */
|
||||
return tmp;
|
||||
}
|
||||
#endif /* DAC_CHANNEL2_SUPPORT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup DACEx_Private_Functions DACEx private functions
|
||||
* @brief Extended private functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(DAC_CHANNEL2_SUPPORT)
|
||||
/**
|
||||
* @brief DMA conversion complete callback.
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
|
||||
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
|
||||
hdac->ConvCpltCallbackCh2(hdac);
|
||||
#else
|
||||
HAL_DACEx_ConvCpltCallbackCh2(hdac);
|
||||
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
|
||||
|
||||
hdac->State = HAL_DAC_STATE_READY;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA half transfer complete callback.
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
/* Conversion complete callback */
|
||||
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
|
||||
hdac->ConvHalfCpltCallbackCh2(hdac);
|
||||
#else
|
||||
HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
|
||||
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA error callback.
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA module.
|
||||
* @retval None
|
||||
*/
|
||||
void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
|
||||
{
|
||||
DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
|
||||
|
||||
/* Set DAC error code to DMA error */
|
||||
hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
|
||||
|
||||
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
|
||||
hdac->ErrorCallbackCh2(hdac);
|
||||
#else
|
||||
HAL_DACEx_ErrorCallbackCh2(hdac);
|
||||
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
|
||||
|
||||
hdac->State = HAL_DAC_STATE_READY;
|
||||
}
|
||||
#endif /* DAC_CHANNEL2_SUPPORT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* DAC */
|
||||
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
|
@ -66,7 +66,7 @@
|
|||
#define configMAX_PRIORITIES ( 7 )
|
||||
#define configMINIMAL_STACK_SIZE ((uint16_t)128)
|
||||
#define configTOTAL_HEAP_SIZE ((size_t)15360)
|
||||
#define configMAX_TASK_NAME_LEN ( 16 )
|
||||
#define configMAX_TASK_NAME_LEN ( 32 )
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configQUEUE_REGISTRY_SIZE 8
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -0,0 +1,52 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file crc.h
|
||||
* @brief This file contains all the function prototypes for
|
||||
* the crc.c file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __CRC_H__
|
||||
#define __CRC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
extern CRC_HandleTypeDef hcrc;
|
||||
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
void MX_CRC_Init(void);
|
||||
|
||||
/* USER CODE BEGIN Prototypes */
|
||||
|
||||
/* USER CODE END Prototypes */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CRC_H__ */
|
||||
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file dac.h
|
||||
* @brief This file contains all the function prototypes for
|
||||
* the dac.c file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __DAC_H__
|
||||
#define __DAC_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
extern DAC_HandleTypeDef hdac;
|
||||
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
void MX_DAC_Init(void);
|
||||
|
||||
/* USER CODE BEGIN Prototypes */
|
||||
|
||||
/* USER CODE END Prototypes */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __DAC_H__ */
|
||||
|
||||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
@ -63,8 +63,9 @@ void Error_Handler(void);
|
|||
#define MAG_RST_GPIO_Port GPIOG
|
||||
#define LED_R_Pin GPIO_PIN_12
|
||||
#define LED_R_GPIO_Port GPIOH
|
||||
#define MAG_DR_Pin GPIO_PIN_3
|
||||
#define MAG_DR_GPIO_Port GPIOG
|
||||
#define INT_MAG_Pin GPIO_PIN_3
|
||||
#define INT_MAG_GPIO_Port GPIOG
|
||||
#define INT_MAG_EXTI_IRQn EXTI3_IRQn
|
||||
#define LED_G_Pin GPIO_PIN_11
|
||||
#define LED_G_GPIO_Port GPIOH
|
||||
#define LED_B_Pin GPIO_PIN_10
|
||||
|
|
@ -75,6 +76,11 @@ void Error_Handler(void);
|
|||
#define KEY_GPIO_Port GPIOA
|
||||
#define CS1_ACCEL_Pin GPIO_PIN_4
|
||||
#define CS1_ACCEL_GPIO_Port GPIOA
|
||||
#define INT_ACCEL_Pin GPIO_PIN_4
|
||||
#define INT_ACCEL_GPIO_Port GPIOC
|
||||
#define INT_ACCEL_EXTI_IRQn EXTI4_IRQn
|
||||
#define INT_GYRO_Pin GPIO_PIN_5
|
||||
#define INT_GYRO_GPIO_Port GPIOC
|
||||
#define SERVO_Pin GPIO_PIN_9
|
||||
#define SERVO_GPIO_Port GPIOE
|
||||
#define CS1_GYRO_Pin GPIO_PIN_0
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -40,9 +40,9 @@
|
|||
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||
#define HAL_ADC_MODULE_ENABLED
|
||||
#define HAL_CAN_MODULE_ENABLED
|
||||
/* #define HAL_CRC_MODULE_ENABLED */
|
||||
#define HAL_CRC_MODULE_ENABLED
|
||||
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
/* #define HAL_DAC_MODULE_ENABLED */
|
||||
#define HAL_DAC_MODULE_ENABLED
|
||||
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||
/* #define HAL_ETH_MODULE_ENABLED */
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
@ -53,19 +53,34 @@ void BusFault_Handler(void);
|
|||
void UsageFault_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
void EXTI3_IRQHandler(void);
|
||||
void EXTI4_IRQHandler(void);
|
||||
void DMA1_Stream1_IRQHandler(void);
|
||||
void DMA1_Stream2_IRQHandler(void);
|
||||
void DMA1_Stream3_IRQHandler(void);
|
||||
void DMA1_Stream4_IRQHandler(void);
|
||||
void CAN1_RX0_IRQHandler(void);
|
||||
void CAN1_RX1_IRQHandler(void);
|
||||
void I2C2_EV_IRQHandler(void);
|
||||
void I2C2_ER_IRQHandler(void);
|
||||
void SPI1_IRQHandler(void);
|
||||
void SPI2_IRQHandler(void);
|
||||
void USART1_IRQHandler(void);
|
||||
void USART3_IRQHandler(void);
|
||||
void DMA2_Stream1_IRQHandler(void);
|
||||
void DMA1_Stream7_IRQHandler(void);
|
||||
void DMA2_Stream0_IRQHandler(void);
|
||||
void DMA2_Stream2_IRQHandler(void);
|
||||
void DMA2_Stream3_IRQHandler(void);
|
||||
void DMA2_Stream4_IRQHandler(void);
|
||||
void CAN2_RX0_IRQHandler(void);
|
||||
void CAN2_RX1_IRQHandler(void);
|
||||
void OTG_FS_IRQHandler(void);
|
||||
void DMA2_Stream5_IRQHandler(void);
|
||||
void DMA2_Stream6_IRQHandler(void);
|
||||
void DMA2_Stream7_IRQHandler(void);
|
||||
void USART6_IRQHandler(void);
|
||||
void I2C3_EV_IRQHandler(void);
|
||||
void I2C3_ER_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
@ -25,6 +25,7 @@
|
|||
/* USER CODE END 0 */
|
||||
|
||||
ADC_HandleTypeDef hadc1;
|
||||
DMA_HandleTypeDef hdma_adc1;
|
||||
|
||||
/* ADC1 init function */
|
||||
void MX_ADC1_Init(void)
|
||||
|
|
@ -84,6 +85,26 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
|
|||
/* USER CODE END ADC1_MspInit 0 */
|
||||
/* ADC1 clock enable */
|
||||
__HAL_RCC_ADC1_CLK_ENABLE();
|
||||
|
||||
/* ADC1 DMA Init */
|
||||
/* ADC1 Init */
|
||||
hdma_adc1.Instance = DMA2_Stream4;
|
||||
hdma_adc1.Init.Channel = DMA_CHANNEL_0;
|
||||
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
||||
hdma_adc1.Init.Mode = DMA_NORMAL;
|
||||
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
|
||||
|
||||
/* USER CODE BEGIN ADC1_MspInit 1 */
|
||||
|
||||
/* USER CODE END ADC1_MspInit 1 */
|
||||
|
|
@ -100,6 +121,9 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
|
|||
/* USER CODE END ADC1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_ADC1_CLK_DISABLE();
|
||||
|
||||
/* ADC1 DMA DeInit */
|
||||
HAL_DMA_DeInit(adcHandle->DMA_Handle);
|
||||
/* USER CODE BEGIN ADC1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END ADC1_MspDeInit 1 */
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -0,0 +1,85 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file crc.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of the CRC instances.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "crc.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
CRC_HandleTypeDef hcrc;
|
||||
|
||||
/* CRC init function */
|
||||
void MX_CRC_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN CRC_Init 0 */
|
||||
|
||||
/* USER CODE END CRC_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN CRC_Init 1 */
|
||||
|
||||
/* USER CODE END CRC_Init 1 */
|
||||
hcrc.Instance = CRC;
|
||||
if (HAL_CRC_Init(&hcrc) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN CRC_Init 2 */
|
||||
|
||||
/* USER CODE END CRC_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
void HAL_CRC_MspInit(CRC_HandleTypeDef* crcHandle)
|
||||
{
|
||||
|
||||
if(crcHandle->Instance==CRC)
|
||||
{
|
||||
/* USER CODE BEGIN CRC_MspInit 0 */
|
||||
|
||||
/* USER CODE END CRC_MspInit 0 */
|
||||
/* CRC clock enable */
|
||||
__HAL_RCC_CRC_CLK_ENABLE();
|
||||
/* USER CODE BEGIN CRC_MspInit 1 */
|
||||
|
||||
/* USER CODE END CRC_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_CRC_MspDeInit(CRC_HandleTypeDef* crcHandle)
|
||||
{
|
||||
|
||||
if(crcHandle->Instance==CRC)
|
||||
{
|
||||
/* USER CODE BEGIN CRC_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END CRC_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_CRC_CLK_DISABLE();
|
||||
/* USER CODE BEGIN CRC_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END CRC_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
|
@ -0,0 +1,116 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file dac.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of the DAC instances.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "dac.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
DAC_HandleTypeDef hdac;
|
||||
|
||||
/* DAC init function */
|
||||
void MX_DAC_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN DAC_Init 0 */
|
||||
|
||||
/* USER CODE END DAC_Init 0 */
|
||||
|
||||
DAC_ChannelConfTypeDef sConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN DAC_Init 1 */
|
||||
|
||||
/* USER CODE END DAC_Init 1 */
|
||||
|
||||
/** DAC Initialization
|
||||
*/
|
||||
hdac.Instance = DAC;
|
||||
if (HAL_DAC_Init(&hdac) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/** DAC channel OUT2 config
|
||||
*/
|
||||
sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
|
||||
sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
|
||||
if (HAL_DAC_ConfigChannel(&hdac, &sConfig, DAC_CHANNEL_2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN DAC_Init 2 */
|
||||
|
||||
/* USER CODE END DAC_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
void HAL_DAC_MspInit(DAC_HandleTypeDef* dacHandle)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(dacHandle->Instance==DAC)
|
||||
{
|
||||
/* USER CODE BEGIN DAC_MspInit 0 */
|
||||
|
||||
/* USER CODE END DAC_MspInit 0 */
|
||||
/* DAC clock enable */
|
||||
__HAL_RCC_DAC_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**DAC GPIO Configuration
|
||||
PA5 ------> DAC_OUT2
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_5;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN DAC_MspInit 1 */
|
||||
|
||||
/* USER CODE END DAC_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_DAC_MspDeInit(DAC_HandleTypeDef* dacHandle)
|
||||
{
|
||||
|
||||
if(dacHandle->Instance==DAC)
|
||||
{
|
||||
/* USER CODE BEGIN DAC_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END DAC_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_DAC_CLK_DISABLE();
|
||||
|
||||
/**DAC GPIO Configuration
|
||||
PA5 ------> DAC_OUT2
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5);
|
||||
|
||||
/* USER CODE BEGIN DAC_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END DAC_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
@ -40,19 +40,40 @@ void MX_DMA_Init(void)
|
|||
{
|
||||
|
||||
/* DMA controller clock enable */
|
||||
__HAL_RCC_DMA1_CLK_ENABLE();
|
||||
__HAL_RCC_DMA2_CLK_ENABLE();
|
||||
__HAL_RCC_DMA1_CLK_ENABLE();
|
||||
|
||||
/* DMA interrupt init */
|
||||
/* DMA1_Stream1_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
|
||||
/* DMA2_Stream1_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
|
||||
/* DMA1_Stream2_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
|
||||
/* DMA1_Stream3_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
|
||||
/* DMA1_Stream4_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
|
||||
/* DMA1_Stream7_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA1_Stream7_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA1_Stream7_IRQn);
|
||||
/* DMA2_Stream0_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
|
||||
/* DMA2_Stream2_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
|
||||
/* DMA2_Stream3_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
|
||||
/* DMA2_Stream4_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA2_Stream4_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA2_Stream4_IRQn);
|
||||
/* DMA2_Stream5_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn);
|
||||
/* DMA2_Stream6_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
@ -56,7 +56,7 @@ void MX_GPIO_Init(void)
|
|||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(MAG_RST_GPIO_Port, MAG_RST_Pin, GPIO_PIN_RESET);
|
||||
HAL_GPIO_WritePin(MAG_RST_GPIO_Port, MAG_RST_Pin, GPIO_PIN_SET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(CS1_ACCEL_GPIO_Port, CS1_ACCEL_Pin, GPIO_PIN_SET);
|
||||
|
|
@ -72,10 +72,10 @@ void MX_GPIO_Init(void)
|
|||
HAL_GPIO_Init(MAG_RST_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : PtPin */
|
||||
GPIO_InitStruct.Pin = MAG_DR_Pin;
|
||||
GPIO_InitStruct.Pin = INT_MAG_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
HAL_GPIO_Init(MAG_DR_GPIO_Port, &GPIO_InitStruct);
|
||||
HAL_GPIO_Init(INT_MAG_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : PtPin */
|
||||
GPIO_InitStruct.Pin = KEY_Pin;
|
||||
|
|
@ -90,6 +90,12 @@ void MX_GPIO_Init(void)
|
|||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
HAL_GPIO_Init(CS1_ACCEL_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : PCPin PCPin */
|
||||
GPIO_InitStruct.Pin = INT_ACCEL_Pin|INT_GYRO_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : PtPin */
|
||||
GPIO_InitStruct.Pin = CS1_GYRO_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
|
|
@ -97,6 +103,13 @@ void MX_GPIO_Init(void)
|
|||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
HAL_GPIO_Init(CS1_GYRO_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* EXTI interrupt init*/
|
||||
HAL_NVIC_SetPriority(EXTI3_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(EXTI3_IRQn);
|
||||
|
||||
HAL_NVIC_SetPriority(EXTI4_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(EXTI4_IRQn);
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
@ -26,6 +26,8 @@
|
|||
|
||||
I2C_HandleTypeDef hi2c2;
|
||||
I2C_HandleTypeDef hi2c3;
|
||||
DMA_HandleTypeDef hdma_i2c2_rx;
|
||||
DMA_HandleTypeDef hdma_i2c2_tx;
|
||||
|
||||
/* I2C2 init function */
|
||||
void MX_I2C2_Init(void)
|
||||
|
|
@ -110,6 +112,49 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
|
|||
|
||||
/* I2C2 clock enable */
|
||||
__HAL_RCC_I2C2_CLK_ENABLE();
|
||||
|
||||
/* I2C2 DMA Init */
|
||||
/* I2C2_RX Init */
|
||||
hdma_i2c2_rx.Instance = DMA1_Stream2;
|
||||
hdma_i2c2_rx.Init.Channel = DMA_CHANNEL_7;
|
||||
hdma_i2c2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_i2c2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_i2c2_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_i2c2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_i2c2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_i2c2_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_i2c2_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_i2c2_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_i2c2_rx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(i2cHandle,hdmarx,hdma_i2c2_rx);
|
||||
|
||||
/* I2C2_TX Init */
|
||||
hdma_i2c2_tx.Instance = DMA1_Stream7;
|
||||
hdma_i2c2_tx.Init.Channel = DMA_CHANNEL_7;
|
||||
hdma_i2c2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_i2c2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_i2c2_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_i2c2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_i2c2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_i2c2_tx.Init.Mode = DMA_NORMAL;
|
||||
hdma_i2c2_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_i2c2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_i2c2_tx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(i2cHandle,hdmatx,hdma_i2c2_tx);
|
||||
|
||||
/* I2C2 interrupt Init */
|
||||
HAL_NVIC_SetPriority(I2C2_EV_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(I2C2_EV_IRQn);
|
||||
HAL_NVIC_SetPriority(I2C2_ER_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(I2C2_ER_IRQn);
|
||||
/* USER CODE BEGIN I2C2_MspInit 1 */
|
||||
|
||||
/* USER CODE END I2C2_MspInit 1 */
|
||||
|
|
@ -142,6 +187,12 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
|
|||
|
||||
/* I2C3 clock enable */
|
||||
__HAL_RCC_I2C3_CLK_ENABLE();
|
||||
|
||||
/* I2C3 interrupt Init */
|
||||
HAL_NVIC_SetPriority(I2C3_EV_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(I2C3_EV_IRQn);
|
||||
HAL_NVIC_SetPriority(I2C3_ER_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(I2C3_ER_IRQn);
|
||||
/* USER CODE BEGIN I2C3_MspInit 1 */
|
||||
|
||||
/* USER CODE END I2C3_MspInit 1 */
|
||||
|
|
@ -167,6 +218,13 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
|
|||
|
||||
HAL_GPIO_DeInit(GPIOF, GPIO_PIN_1);
|
||||
|
||||
/* I2C2 DMA DeInit */
|
||||
HAL_DMA_DeInit(i2cHandle->hdmarx);
|
||||
HAL_DMA_DeInit(i2cHandle->hdmatx);
|
||||
|
||||
/* I2C2 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(I2C2_EV_IRQn);
|
||||
HAL_NVIC_DisableIRQ(I2C2_ER_IRQn);
|
||||
/* USER CODE BEGIN I2C2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END I2C2_MspDeInit 1 */
|
||||
|
|
@ -187,6 +245,9 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
|
|||
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_8);
|
||||
|
||||
/* I2C3 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(I2C3_EV_IRQn);
|
||||
HAL_NVIC_DisableIRQ(I2C3_ER_IRQn);
|
||||
/* USER CODE BEGIN I2C3_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END I2C3_MspDeInit 1 */
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
@ -26,6 +26,10 @@
|
|||
|
||||
SPI_HandleTypeDef hspi1;
|
||||
SPI_HandleTypeDef hspi2;
|
||||
DMA_HandleTypeDef hdma_spi1_rx;
|
||||
DMA_HandleTypeDef hdma_spi1_tx;
|
||||
DMA_HandleTypeDef hdma_spi2_rx;
|
||||
DMA_HandleTypeDef hdma_spi2_tx;
|
||||
|
||||
/* SPI1 init function */
|
||||
void MX_SPI1_Init(void)
|
||||
|
|
@ -125,6 +129,49 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
|
|||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* SPI1 DMA Init */
|
||||
/* SPI1_RX Init */
|
||||
hdma_spi1_rx.Instance = DMA2_Stream0;
|
||||
hdma_spi1_rx.Init.Channel = DMA_CHANNEL_3;
|
||||
hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_spi1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_spi1_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_spi1_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_spi1_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_spi1_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
|
||||
hdma_spi1_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
||||
hdma_spi1_rx.Init.MemBurst = DMA_MBURST_SINGLE;
|
||||
hdma_spi1_rx.Init.PeriphBurst = DMA_PBURST_SINGLE;
|
||||
if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(spiHandle,hdmarx,hdma_spi1_rx);
|
||||
|
||||
/* SPI1_TX Init */
|
||||
hdma_spi1_tx.Instance = DMA2_Stream3;
|
||||
hdma_spi1_tx.Init.Channel = DMA_CHANNEL_3;
|
||||
hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_spi1_tx.Init.Mode = DMA_NORMAL;
|
||||
hdma_spi1_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(spiHandle,hdmatx,hdma_spi1_tx);
|
||||
|
||||
/* SPI1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(SPI1_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(SPI1_IRQn);
|
||||
/* USER CODE BEGIN SPI1_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 1 */
|
||||
|
|
@ -150,6 +197,52 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
|
|||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* SPI2 DMA Init */
|
||||
/* SPI2_RX Init */
|
||||
hdma_spi2_rx.Instance = DMA1_Stream3;
|
||||
hdma_spi2_rx.Init.Channel = DMA_CHANNEL_0;
|
||||
hdma_spi2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_spi2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_spi2_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_spi2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_spi2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_spi2_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_spi2_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_spi2_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
|
||||
hdma_spi2_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
||||
hdma_spi2_rx.Init.MemBurst = DMA_MBURST_SINGLE;
|
||||
hdma_spi2_rx.Init.PeriphBurst = DMA_PBURST_SINGLE;
|
||||
if (HAL_DMA_Init(&hdma_spi2_rx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(spiHandle,hdmarx,hdma_spi2_rx);
|
||||
|
||||
/* SPI2_TX Init */
|
||||
hdma_spi2_tx.Instance = DMA1_Stream4;
|
||||
hdma_spi2_tx.Init.Channel = DMA_CHANNEL_0;
|
||||
hdma_spi2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_spi2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_spi2_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_spi2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_spi2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_spi2_tx.Init.Mode = DMA_NORMAL;
|
||||
hdma_spi2_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_spi2_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
|
||||
hdma_spi2_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
||||
hdma_spi2_tx.Init.MemBurst = DMA_MBURST_SINGLE;
|
||||
hdma_spi2_tx.Init.PeriphBurst = DMA_PBURST_SINGLE;
|
||||
if (HAL_DMA_Init(&hdma_spi2_tx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(spiHandle,hdmatx,hdma_spi2_tx);
|
||||
|
||||
/* SPI2 interrupt Init */
|
||||
HAL_NVIC_SetPriority(SPI2_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(SPI2_IRQn);
|
||||
/* USER CODE BEGIN SPI2_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI2_MspInit 1 */
|
||||
|
|
@ -176,6 +269,12 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
|
|||
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_7);
|
||||
|
||||
/* SPI1 DMA DeInit */
|
||||
HAL_DMA_DeInit(spiHandle->hdmarx);
|
||||
HAL_DMA_DeInit(spiHandle->hdmatx);
|
||||
|
||||
/* SPI1 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(SPI1_IRQn);
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 1 */
|
||||
|
|
@ -195,6 +294,12 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
|
|||
*/
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
|
||||
|
||||
/* SPI2 DMA DeInit */
|
||||
HAL_DMA_DeInit(spiHandle->hdmarx);
|
||||
HAL_DMA_DeInit(spiHandle->hdmatx);
|
||||
|
||||
/* SPI2 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(SPI2_IRQn);
|
||||
/* USER CODE BEGIN SPI2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI2_MspDeInit 1 */
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
@ -58,8 +58,19 @@
|
|||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
|
||||
extern DMA_HandleTypeDef hdma_adc1;
|
||||
extern CAN_HandleTypeDef hcan1;
|
||||
extern CAN_HandleTypeDef hcan2;
|
||||
extern DMA_HandleTypeDef hdma_i2c2_rx;
|
||||
extern DMA_HandleTypeDef hdma_i2c2_tx;
|
||||
extern I2C_HandleTypeDef hi2c2;
|
||||
extern I2C_HandleTypeDef hi2c3;
|
||||
extern DMA_HandleTypeDef hdma_spi1_rx;
|
||||
extern DMA_HandleTypeDef hdma_spi1_tx;
|
||||
extern DMA_HandleTypeDef hdma_spi2_rx;
|
||||
extern DMA_HandleTypeDef hdma_spi2_tx;
|
||||
extern SPI_HandleTypeDef hspi1;
|
||||
extern SPI_HandleTypeDef hspi2;
|
||||
extern DMA_HandleTypeDef hdma_usart1_tx;
|
||||
extern DMA_HandleTypeDef hdma_usart1_rx;
|
||||
extern DMA_HandleTypeDef hdma_usart3_rx;
|
||||
|
|
@ -100,9 +111,9 @@ void HardFault_Handler(void)
|
|||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
// 发生hardfault,点击step over会自动跳转回出错的指令,方便调试
|
||||
asm("bx lr");
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
|
@ -194,6 +205,34 @@ void SysTick_Handler(void)
|
|||
/* please refer to the startup file (startup_stm32f4xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles EXTI line3 interrupt.
|
||||
*/
|
||||
void EXTI3_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN EXTI3_IRQn 0 */
|
||||
|
||||
/* USER CODE END EXTI3_IRQn 0 */
|
||||
HAL_GPIO_EXTI_IRQHandler(INT_MAG_Pin);
|
||||
/* USER CODE BEGIN EXTI3_IRQn 1 */
|
||||
|
||||
/* USER CODE END EXTI3_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles EXTI line4 interrupt.
|
||||
*/
|
||||
void EXTI4_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN EXTI4_IRQn 0 */
|
||||
|
||||
/* USER CODE END EXTI4_IRQn 0 */
|
||||
HAL_GPIO_EXTI_IRQHandler(INT_ACCEL_Pin);
|
||||
/* USER CODE BEGIN EXTI4_IRQn 1 */
|
||||
|
||||
/* USER CODE END EXTI4_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA1 stream1 global interrupt.
|
||||
*/
|
||||
|
|
@ -208,6 +247,48 @@ void DMA1_Stream1_IRQHandler(void)
|
|||
/* USER CODE END DMA1_Stream1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA1 stream2 global interrupt.
|
||||
*/
|
||||
void DMA1_Stream2_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA1_Stream2_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_i2c2_rx);
|
||||
/* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA1_Stream2_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA1 stream3 global interrupt.
|
||||
*/
|
||||
void DMA1_Stream3_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA1_Stream3_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_spi2_rx);
|
||||
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA1_Stream3_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA1 stream4 global interrupt.
|
||||
*/
|
||||
void DMA1_Stream4_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA1_Stream4_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_spi2_tx);
|
||||
/* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA1_Stream4_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles CAN1 RX0 interrupts.
|
||||
*/
|
||||
|
|
@ -236,6 +317,62 @@ void CAN1_RX1_IRQHandler(void)
|
|||
/* USER CODE END CAN1_RX1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles I2C2 event interrupt.
|
||||
*/
|
||||
void I2C2_EV_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN I2C2_EV_IRQn 0 */
|
||||
|
||||
/* USER CODE END I2C2_EV_IRQn 0 */
|
||||
HAL_I2C_EV_IRQHandler(&hi2c2);
|
||||
/* USER CODE BEGIN I2C2_EV_IRQn 1 */
|
||||
|
||||
/* USER CODE END I2C2_EV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles I2C2 error interrupt.
|
||||
*/
|
||||
void I2C2_ER_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN I2C2_ER_IRQn 0 */
|
||||
|
||||
/* USER CODE END I2C2_ER_IRQn 0 */
|
||||
HAL_I2C_ER_IRQHandler(&hi2c2);
|
||||
/* USER CODE BEGIN I2C2_ER_IRQn 1 */
|
||||
|
||||
/* USER CODE END I2C2_ER_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles SPI1 global interrupt.
|
||||
*/
|
||||
void SPI1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_IRQn 0 */
|
||||
|
||||
/* USER CODE END SPI1_IRQn 0 */
|
||||
HAL_SPI_IRQHandler(&hspi1);
|
||||
/* USER CODE BEGIN SPI1_IRQn 1 */
|
||||
|
||||
/* USER CODE END SPI1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles SPI2 global interrupt.
|
||||
*/
|
||||
void SPI2_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SPI2_IRQn 0 */
|
||||
|
||||
/* USER CODE END SPI2_IRQn 0 */
|
||||
HAL_SPI_IRQHandler(&hspi2);
|
||||
/* USER CODE BEGIN SPI2_IRQn 1 */
|
||||
|
||||
/* USER CODE END SPI2_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles USART1 global interrupt.
|
||||
*/
|
||||
|
|
@ -265,17 +402,31 @@ void USART3_IRQHandler(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA2 stream1 global interrupt.
|
||||
* @brief This function handles DMA1 stream7 global interrupt.
|
||||
*/
|
||||
void DMA2_Stream1_IRQHandler(void)
|
||||
void DMA1_Stream7_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
|
||||
/* USER CODE BEGIN DMA1_Stream7_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA2_Stream1_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_usart6_rx);
|
||||
/* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
|
||||
/* USER CODE END DMA1_Stream7_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_i2c2_tx);
|
||||
/* USER CODE BEGIN DMA1_Stream7_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA2_Stream1_IRQn 1 */
|
||||
/* USER CODE END DMA1_Stream7_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA2 stream0 global interrupt.
|
||||
*/
|
||||
void DMA2_Stream0_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA2_Stream0_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_spi1_rx);
|
||||
/* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA2_Stream0_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -286,12 +437,40 @@ void DMA2_Stream2_IRQHandler(void)
|
|||
/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA2_Stream2_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_usart1_rx);
|
||||
HAL_DMA_IRQHandler(&hdma_usart6_rx);
|
||||
/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA2_Stream2_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA2 stream3 global interrupt.
|
||||
*/
|
||||
void DMA2_Stream3_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA2_Stream3_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA2_Stream3_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_spi1_tx);
|
||||
/* USER CODE BEGIN DMA2_Stream3_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA2_Stream3_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA2 stream4 global interrupt.
|
||||
*/
|
||||
void DMA2_Stream4_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA2_Stream4_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA2_Stream4_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_adc1);
|
||||
/* USER CODE BEGIN DMA2_Stream4_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA2_Stream4_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles CAN2 RX0 interrupts.
|
||||
*/
|
||||
|
|
@ -334,6 +513,20 @@ void OTG_FS_IRQHandler(void)
|
|||
/* USER CODE END OTG_FS_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA2 stream5 global interrupt.
|
||||
*/
|
||||
void DMA2_Stream5_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA2_Stream5_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA2_Stream5_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_usart1_rx);
|
||||
/* USER CODE BEGIN DMA2_Stream5_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA2_Stream5_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA2 stream6 global interrupt.
|
||||
*/
|
||||
|
|
@ -376,6 +569,34 @@ void USART6_IRQHandler(void)
|
|||
/* USER CODE END USART6_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles I2C3 event interrupt.
|
||||
*/
|
||||
void I2C3_EV_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN I2C3_EV_IRQn 0 */
|
||||
|
||||
/* USER CODE END I2C3_EV_IRQn 0 */
|
||||
HAL_I2C_EV_IRQHandler(&hi2c3);
|
||||
/* USER CODE BEGIN I2C3_EV_IRQn 1 */
|
||||
|
||||
/* USER CODE END I2C3_EV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles I2C3 error interrupt.
|
||||
*/
|
||||
void I2C3_ER_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN I2C3_ER_IRQn 0 */
|
||||
|
||||
/* USER CODE END I2C3_ER_IRQn 0 */
|
||||
HAL_I2C_ER_IRQHandler(&hi2c3);
|
||||
/* USER CODE BEGIN I2C3_ER_IRQn 1 */
|
||||
|
||||
/* USER CODE END I2C3_ER_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
@ -423,20 +423,13 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
|
|||
PE11 ------> TIM1_CH2
|
||||
PE14 ------> TIM1_CH4
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_11|GPIO_PIN_14;
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_13|SERVO_Pin|GPIO_PIN_11|GPIO_PIN_14;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = SERVO_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
||||
HAL_GPIO_Init(SERVO_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspPostInit 1 */
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
@ -173,7 +173,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
|||
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx);
|
||||
|
||||
/* USART1_RX Init */
|
||||
hdma_usart1_rx.Instance = DMA2_Stream2;
|
||||
hdma_usart1_rx.Instance = DMA2_Stream5;
|
||||
hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4;
|
||||
hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
|
|
@ -227,7 +227,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
|||
hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_usart3_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_usart3_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
|
||||
hdma_usart3_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_usart3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK)
|
||||
{
|
||||
|
|
@ -265,7 +265,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
|||
|
||||
/* USART6 DMA Init */
|
||||
/* USART6_RX Init */
|
||||
hdma_usart6_rx.Instance = DMA2_Stream1;
|
||||
hdma_usart6_rx.Instance = DMA2_Stream2;
|
||||
hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5;
|
||||
hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
|
|||
4
Makefile
4
Makefile
|
|
@ -122,6 +122,7 @@ modules/algorithm/user_lib.c \
|
|||
modules/imu/BMI088driver.c \
|
||||
modules/imu/BMI088Middleware.c \
|
||||
modules/imu/ins_task.c \
|
||||
modules/ist8310/ist8310.c \
|
||||
modules/led/led_task.c \
|
||||
modules/master_machine/master_process.c \
|
||||
modules/master_machine/seasky_protocol.c \
|
||||
|
|
@ -132,7 +133,7 @@ modules/motor/step_motor/step_motor.c \
|
|||
modules/motor/servo_motor/servo_motor.c \
|
||||
modules/motor/motor_task.c \
|
||||
modules/oled/oled.c \
|
||||
modules/referee/crc.c \
|
||||
modules/referee/crc_ref.c \
|
||||
modules/referee/referee.c \
|
||||
modules/referee/referee_UI.c \
|
||||
modules/referee/referee_communication.c \
|
||||
|
|
@ -239,6 +240,7 @@ C_INCLUDES = \
|
|||
-Ibsp \
|
||||
-Imodules/algorithm \
|
||||
-Imodules/imu \
|
||||
-Imodules/ist8310 \
|
||||
-Imodules/led \
|
||||
-Imodules/master_machine \
|
||||
-Imodules/motor/DJImotor \
|
||||
|
|
|
|||
Binary file not shown.
|
After Width: | Height: | Size: 136 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 32 KiB |
|
|
@ -5,12 +5,28 @@
|
|||
static uint8_t idx;
|
||||
static GPIOInstance* gpio_instance[GPIO_MX_DEVICE_NUM] = {NULL};
|
||||
|
||||
/**
|
||||
* @brief EXTI中断回调函数,根据GPIO_Pin找到对应的GPIOInstance,并调用模块回调函数(如果有)
|
||||
* @note 如何判断具体是哪一个GPIO的引脚连接到这个EXTI中断线上?
|
||||
* 一个EXTI中断线只能连接一个GPIO引脚,因此可以通过GPIO_Pin来判断,PinX对应EXTIX
|
||||
* 一个Pin号只会对应一个EXTI,详情见gpio.md
|
||||
* @param GPIO_Pin 发生中断的GPIO_Pin
|
||||
*/
|
||||
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
|
||||
{
|
||||
|
||||
// 如有必要,可以根据pinstate和HAL_GPIO_ReadPin来判断是上升沿还是下降沿/rise&fall等
|
||||
static GPIOInstance *gpio;
|
||||
for (size_t i = 0; i < idx; i++)
|
||||
{
|
||||
gpio=gpio_instance[i];
|
||||
if(gpio->GPIO_Pin==GPIO_Pin && gpio->gpio_model_callback!=NULL)
|
||||
{
|
||||
gpio->gpio_model_callback(gpio);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
GPIOInstance *GPIORegister(GPIO_Init_Config_s *GPIO_config)
|
||||
{
|
||||
GPIOInstance *ins=(GPIOInstance*)malloc(sizeof(GPIOInstance));
|
||||
|
|
@ -18,6 +34,8 @@ GPIOInstance *GPIORegister(GPIO_Init_Config_s *GPIO_config)
|
|||
|
||||
ins->GPIOx=GPIO_config->GPIOx;
|
||||
ins->GPIO_Pin=GPIO_config->GPIO_Pin;
|
||||
ins->pin_state=GPIO_config->pin_state;
|
||||
ins->exti_mode=GPIO_config->exti_mode;
|
||||
ins->id=GPIO_config->id;
|
||||
ins->gpio_model_callback=GPIO_config->gpio_model_callback;
|
||||
|
||||
|
|
|
|||
|
|
@ -4,35 +4,82 @@
|
|||
#define GPIO_MX_DEVICE_NUM 10
|
||||
|
||||
/**
|
||||
* @brief GPIO实例结构体定义
|
||||
*
|
||||
* @brief 用于判断中断来源,注意和CUBEMX中配置一致
|
||||
*
|
||||
*/
|
||||
typedef struct tmpgpio
|
||||
typedef enum
|
||||
{
|
||||
GPIO_TypeDef *GPIOx;
|
||||
uint16_t GPIO_Pin;
|
||||
void* id;
|
||||
void (*gpio_model_callback)(struct tmpgpio*); // 随便取个名字当临时声明
|
||||
GPIO_EXTI_MODE_RISING,
|
||||
GPIO_EXTI_MODE_FALLING,
|
||||
GPIO_EXTI_MODE_RISING_FALLING,
|
||||
GPIO_EXTI_MODE_NONE,
|
||||
} GPIO_EXTI_MODE_e;
|
||||
|
||||
/**
|
||||
* @brief GPIO实例结构体定义
|
||||
*
|
||||
*/
|
||||
typedef struct tmpgpio
|
||||
{
|
||||
GPIO_TypeDef *GPIOx; // GPIOA,GPIOB,GPIOC...
|
||||
GPIO_PinState pin_state; // 引脚状态,Set,Reset;not frequently used
|
||||
GPIO_EXTI_MODE_e exti_mode; // 外部中断模式 not frequently used
|
||||
uint16_t GPIO_Pin; // 引脚号
|
||||
// 随便取个名字当临时声明
|
||||
void (*gpio_model_callback)(struct tmpgpio *); // exti中断回调函数
|
||||
void *id; // 区分不同的GPIO实例
|
||||
|
||||
} GPIOInstance;
|
||||
|
||||
/**
|
||||
* @brief GPIO初始化配置结构体定义
|
||||
*
|
||||
*
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
GPIO_TypeDef *GPIOx;
|
||||
uint16_t GPIO_Pin;
|
||||
void* id;
|
||||
void (*gpio_model_callback)(GPIOInstance*);
|
||||
GPIO_TypeDef *GPIOx; // GPIOA,GPIOB,GPIOC...
|
||||
GPIO_PinState pin_state; // 引脚状态,Set,Reset not frequently used
|
||||
GPIO_EXTI_MODE_e exti_mode; // 外部中断模式 not frequently used
|
||||
uint16_t GPIO_Pin; // 引脚号
|
||||
|
||||
void (*gpio_model_callback)(GPIOInstance *); // exti中断回调函数
|
||||
void *id; // 区分不同的GPIO实例
|
||||
|
||||
} GPIO_Init_Config_s;
|
||||
|
||||
GPIOInstance* GPIORegister(GPIO_Init_Config_s* GPIO_config);
|
||||
/**
|
||||
* @brief 注册GPIO实例
|
||||
*
|
||||
* @param GPIO_config
|
||||
* @return GPIOInstance*
|
||||
*/
|
||||
GPIOInstance *GPIORegister(GPIO_Init_Config_s *GPIO_config);
|
||||
|
||||
void GPIOToggel(GPIOInstance* _instance);
|
||||
/**
|
||||
* @brief GPIO API,切换GPIO电平
|
||||
*
|
||||
* @param _instance
|
||||
*/
|
||||
void GPIOToggel(GPIOInstance *_instance);
|
||||
|
||||
void GPIOSet(GPIOInstance* _instance);
|
||||
/**
|
||||
* @brief 设置GPIO电平
|
||||
*
|
||||
* @param _instance
|
||||
*/
|
||||
void GPIOSet(GPIOInstance *_instance);
|
||||
|
||||
void GPIOReset(GPIOInstance* _instance);
|
||||
/**
|
||||
* @brief 复位GPIO电平
|
||||
*
|
||||
* @param _instance
|
||||
*/
|
||||
void GPIOReset(GPIOInstance *_instance);
|
||||
|
||||
GPIO_PinState GPIORead(GPIOInstance* _instance);
|
||||
/**
|
||||
* @brief 读取GPIO电平
|
||||
*
|
||||
* @param _instance
|
||||
* @return GPIO_PinState
|
||||
*/
|
||||
GPIO_PinState GPIORead(GPIOInstance *_instance);
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
|
||||
|
||||
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
#pragma once
|
||||
|
||||
#include "bsp_i2c.h"
|
||||
#include "bsp_iic.h"
|
||||
#include "stdint.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
#include "crc.h"
|
||||
#include "crc_ref.h"
|
||||
#include <stdio.h>
|
||||
//裁判系统官方CRC校验
|
||||
|
||||
Loading…
Reference in New Issue