336 lines
8.2 KiB
C
336 lines
8.2 KiB
C
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32f4xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2022 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32f4xx_it.h"
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#include "FreeRTOS.h"
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#include "task.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
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extern CAN_HandleTypeDef hcan1;
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extern CAN_HandleTypeDef hcan2;
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extern DMA_HandleTypeDef hdma_usart1_tx;
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extern DMA_HandleTypeDef hdma_usart1_rx;
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extern DMA_HandleTypeDef hdma_usart3_rx;
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extern DMA_HandleTypeDef hdma_usart6_rx;
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extern DMA_HandleTypeDef hdma_usart6_tx;
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extern UART_HandleTypeDef huart1;
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extern UART_HandleTypeDef huart6;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex-M4 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/**
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* @brief This function handles System tick timer.
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*/
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void SysTick_Handler(void)
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{
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/* USER CODE BEGIN SysTick_IRQn 0 */
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/* USER CODE END SysTick_IRQn 0 */
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HAL_IncTick();
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#if (INCLUDE_xTaskGetSchedulerState == 1 )
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if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED)
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{
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#endif /* INCLUDE_xTaskGetSchedulerState */
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xPortSysTickHandler();
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#if (INCLUDE_xTaskGetSchedulerState == 1 )
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}
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#endif /* INCLUDE_xTaskGetSchedulerState */
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/* USER CODE BEGIN SysTick_IRQn 1 */
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/* USER CODE END SysTick_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32F4xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32f4xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 stream1 global interrupt.
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*/
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void DMA1_Stream1_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
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/* USER CODE END DMA1_Stream1_IRQn 0 */
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/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
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/* USER CODE END DMA1_Stream1_IRQn 1 */
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}
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/**
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* @brief This function handles CAN1 RX0 interrupts.
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*/
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void CAN1_RX0_IRQHandler(void)
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{
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/* USER CODE BEGIN CAN1_RX0_IRQn 0 */
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/* USER CODE END CAN1_RX0_IRQn 0 */
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HAL_CAN_IRQHandler(&hcan1);
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/* USER CODE BEGIN CAN1_RX0_IRQn 1 */
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/* USER CODE END CAN1_RX0_IRQn 1 */
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}
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/**
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* @brief This function handles USART1 global interrupt.
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*/
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void USART1_IRQHandler(void)
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{
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/* USER CODE BEGIN USART1_IRQn 0 */
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/* USER CODE END USART1_IRQn 0 */
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HAL_UART_IRQHandler(&huart1);
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/* USER CODE BEGIN USART1_IRQn 1 */
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/* USER CODE END USART1_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream1 global interrupt.
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*/
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void DMA2_Stream1_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
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/* USER CODE END DMA2_Stream1_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart6_rx);
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/* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
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/* USER CODE END DMA2_Stream1_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream2 global interrupt.
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*/
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void DMA2_Stream2_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
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/* USER CODE END DMA2_Stream2_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart1_rx);
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/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
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/* USER CODE END DMA2_Stream2_IRQn 1 */
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}
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/**
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* @brief This function handles CAN2 RX0 interrupts.
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*/
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void CAN2_RX0_IRQHandler(void)
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{
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/* USER CODE BEGIN CAN2_RX0_IRQn 0 */
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/* USER CODE END CAN2_RX0_IRQn 0 */
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HAL_CAN_IRQHandler(&hcan2);
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/* USER CODE BEGIN CAN2_RX0_IRQn 1 */
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/* USER CODE END CAN2_RX0_IRQn 1 */
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}
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/**
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* @brief This function handles USB On The Go FS global interrupt.
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*/
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void OTG_FS_IRQHandler(void)
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{
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/* USER CODE BEGIN OTG_FS_IRQn 0 */
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/* USER CODE END OTG_FS_IRQn 0 */
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HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
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/* USER CODE BEGIN OTG_FS_IRQn 1 */
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/* USER CODE END OTG_FS_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream6 global interrupt.
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*/
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void DMA2_Stream6_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
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/* USER CODE END DMA2_Stream6_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart6_tx);
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/* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
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/* USER CODE END DMA2_Stream6_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream7 global interrupt.
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*/
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void DMA2_Stream7_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
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/* USER CODE END DMA2_Stream7_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart1_tx);
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/* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
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/* USER CODE END DMA2_Stream7_IRQn 1 */
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}
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/**
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* @brief This function handles USART6 global interrupt.
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*/
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void USART6_IRQHandler(void)
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{
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/* USER CODE BEGIN USART6_IRQn 0 */
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/* USER CODE END USART6_IRQn 0 */
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HAL_UART_IRQHandler(&huart6);
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/* USER CODE BEGIN USART6_IRQn 1 */
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/* USER CODE END USART6_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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