保存之前的串口接收方式
This commit is contained in:
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cb63698a50
commit
e6c356c563
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@ -57,29 +57,20 @@ void DMA1_Stream1_IRQHandler(void);
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void DMA1_Stream2_IRQHandler(void);
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void DMA1_Stream3_IRQHandler(void);
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void DMA1_Stream4_IRQHandler(void);
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void DMA1_Stream5_IRQHandler(void);
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void DMA1_Stream6_IRQHandler(void);
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void FDCAN1_IT0_IRQHandler(void);
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void FDCAN2_IT0_IRQHandler(void);
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void FDCAN1_IT1_IRQHandler(void);
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void FDCAN2_IT1_IRQHandler(void);
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void SPI1_IRQHandler(void);
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void USART1_IRQHandler(void);
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void USART2_IRQHandler(void);
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void USART3_IRQHandler(void);
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void TIM8_TRG_COM_TIM14_IRQHandler(void);
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void DMA1_Stream7_IRQHandler(void);
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void UART5_IRQHandler(void);
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void DMA2_Stream0_IRQHandler(void);
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void DMA2_Stream1_IRQHandler(void);
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void DMA2_Stream2_IRQHandler(void);
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void DMA2_Stream3_IRQHandler(void);
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void DMA2_Stream4_IRQHandler(void);
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void FDCAN_CAL_IRQHandler(void);
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void OTG_HS_EP1_OUT_IRQHandler(void);
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void OTG_HS_EP1_IN_IRQHandler(void);
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void OTG_HS_IRQHandler(void);
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void UART7_IRQHandler(void);
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void USART10_IRQHandler(void);
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void FDCAN3_IT0_IRQHandler(void);
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void FDCAN3_IT1_IRQHandler(void);
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@ -34,12 +34,6 @@ extern "C" {
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extern UART_HandleTypeDef huart5;
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extern UART_HandleTypeDef huart7;
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extern UART_HandleTypeDef huart1;
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extern UART_HandleTypeDef huart2;
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extern UART_HandleTypeDef huart3;
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extern UART_HandleTypeDef huart10;
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@ -49,9 +43,6 @@ extern UART_HandleTypeDef huart10;
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/* USER CODE END Private defines */
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void MX_UART5_Init(void);
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void MX_UART7_Init(void);
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void MX_USART1_UART_Init(void);
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void MX_USART2_UART_Init(void);
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void MX_USART3_UART_Init(void);
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void MX_USART10_UART_Init(void);
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@ -59,24 +59,6 @@ void MX_DMA_Init(void)
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/* DMA1_Stream4_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
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/* DMA1_Stream5_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
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/* DMA1_Stream6_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Stream6_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA1_Stream6_IRQn);
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/* DMA1_Stream7_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Stream7_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA1_Stream7_IRQn);
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/* DMA2_Stream0_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
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/* DMA2_Stream1_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
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/* DMA2_Stream2_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
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/* DMA2_Stream3_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
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@ -38,6 +38,10 @@
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* Output
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* EVENT_OUT
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* EXTI
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PA10 ------> USART1_RX
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PD4 ------> USART2_DE
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PD5 ------> USART2_TX
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PD6 ------> USART2_RX
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*/
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void MX_GPIO_Init(void)
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{
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@ -104,6 +108,22 @@ void MX_GPIO_Init(void)
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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HAL_GPIO_Init(LCD_GPIO_GPIO_Port, &GPIO_InitStruct);
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/*Configure GPIO pin : PA10 */
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GPIO_InitStruct.Pin = GPIO_PIN_10;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/*Configure GPIO pins : PD4 PD5 PD6 */
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GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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}
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/* USER CODE BEGIN 2 */
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@ -111,9 +111,6 @@ int main(void)
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MX_TIM3_Init();
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MX_TIM12_Init();
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MX_UART5_Init();
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MX_UART7_Init();
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MX_USART1_UART_Init();
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MX_USART2_UART_Init();
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MX_USART3_UART_Init();
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MX_USART10_UART_Init();
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MX_I2C2_Init();
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@ -63,20 +63,11 @@ extern DMA_HandleTypeDef hdma_spi1_rx;
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extern DMA_HandleTypeDef hdma_spi1_tx;
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extern SPI_HandleTypeDef hspi1;
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extern DMA_HandleTypeDef hdma_uart5_rx;
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extern DMA_HandleTypeDef hdma_uart7_rx;
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extern DMA_HandleTypeDef hdma_uart7_tx;
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extern DMA_HandleTypeDef hdma_usart1_tx;
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extern DMA_HandleTypeDef hdma_usart1_rx;
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extern DMA_HandleTypeDef hdma_usart2_rx;
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extern DMA_HandleTypeDef hdma_usart2_tx;
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extern DMA_HandleTypeDef hdma_usart3_tx;
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extern DMA_HandleTypeDef hdma_usart3_rx;
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extern DMA_HandleTypeDef hdma_usart10_rx;
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extern DMA_HandleTypeDef hdma_usart10_tx;
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extern UART_HandleTypeDef huart5;
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extern UART_HandleTypeDef huart7;
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extern UART_HandleTypeDef huart1;
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extern UART_HandleTypeDef huart2;
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extern UART_HandleTypeDef huart3;
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extern UART_HandleTypeDef huart10;
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extern TIM_HandleTypeDef htim14;
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@ -253,34 +244,6 @@ void DMA1_Stream4_IRQHandler(void)
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/* USER CODE END DMA1_Stream4_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream5 global interrupt.
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*/
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void DMA1_Stream5_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
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/* USER CODE END DMA1_Stream5_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart1_tx);
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/* USER CODE BEGIN DMA1_Stream5_IRQn 1 */
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/* USER CODE END DMA1_Stream5_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream6 global interrupt.
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*/
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void DMA1_Stream6_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream6_IRQn 0 */
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/* USER CODE END DMA1_Stream6_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart1_rx);
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/* USER CODE BEGIN DMA1_Stream6_IRQn 1 */
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/* USER CODE END DMA1_Stream6_IRQn 1 */
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}
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/**
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* @brief This function handles FDCAN1 interrupt 0.
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*/
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@ -351,34 +314,6 @@ void SPI1_IRQHandler(void)
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/* USER CODE END SPI1_IRQn 1 */
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}
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/**
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* @brief This function handles USART1 global interrupt.
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*/
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void USART1_IRQHandler(void)
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{
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/* USER CODE BEGIN USART1_IRQn 0 */
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/* USER CODE END USART1_IRQn 0 */
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HAL_UART_IRQHandler(&huart1);
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/* USER CODE BEGIN USART1_IRQn 1 */
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/* USER CODE END USART1_IRQn 1 */
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}
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/**
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* @brief This function handles USART2 global interrupt.
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*/
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void USART2_IRQHandler(void)
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{
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/* USER CODE BEGIN USART2_IRQn 0 */
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/* USER CODE END USART2_IRQn 0 */
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HAL_UART_IRQHandler(&huart2);
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/* USER CODE BEGIN USART2_IRQn 1 */
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/* USER CODE END USART2_IRQn 1 */
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}
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/**
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* @brief This function handles USART3 global interrupt.
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*/
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@ -407,20 +342,6 @@ void TIM8_TRG_COM_TIM14_IRQHandler(void)
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/* USER CODE END TIM8_TRG_COM_TIM14_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream7 global interrupt.
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*/
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void DMA1_Stream7_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream7_IRQn 0 */
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/* USER CODE END DMA1_Stream7_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_uart7_rx);
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/* USER CODE BEGIN DMA1_Stream7_IRQn 1 */
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/* USER CODE END DMA1_Stream7_IRQn 1 */
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}
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/**
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* @brief This function handles UART5 global interrupt.
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*/
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@ -435,48 +356,6 @@ void UART5_IRQHandler(void)
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/* USER CODE END UART5_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream0 global interrupt.
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*/
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void DMA2_Stream0_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
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/* USER CODE END DMA2_Stream0_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_uart7_tx);
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/* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
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/* USER CODE END DMA2_Stream0_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream1 global interrupt.
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*/
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void DMA2_Stream1_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
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/* USER CODE END DMA2_Stream1_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart2_rx);
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/* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
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/* USER CODE END DMA2_Stream1_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream2 global interrupt.
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*/
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void DMA2_Stream2_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
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/* USER CODE END DMA2_Stream2_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart2_tx);
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/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
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/* USER CODE END DMA2_Stream2_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream3 global interrupt.
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*/
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@ -562,20 +441,6 @@ void OTG_HS_IRQHandler(void)
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/* USER CODE END OTG_HS_IRQn 1 */
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}
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/**
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* @brief This function handles UART7 global interrupt.
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*/
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void UART7_IRQHandler(void)
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{
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/* USER CODE BEGIN UART7_IRQn 0 */
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/* USER CODE END UART7_IRQn 0 */
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HAL_UART_IRQHandler(&huart7);
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/* USER CODE BEGIN UART7_IRQn 1 */
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/* USER CODE END UART7_IRQn 1 */
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}
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/**
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* @brief This function handles USART10 global interrupt.
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*/
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442
Core/Src/usart.c
442
Core/Src/usart.c
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@ -25,18 +25,9 @@
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/* USER CODE END 0 */
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UART_HandleTypeDef huart5;
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UART_HandleTypeDef huart7;
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UART_HandleTypeDef huart1;
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UART_HandleTypeDef huart2;
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UART_HandleTypeDef huart3;
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UART_HandleTypeDef huart10;
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DMA_HandleTypeDef hdma_uart5_rx;
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DMA_HandleTypeDef hdma_uart7_rx;
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DMA_HandleTypeDef hdma_uart7_tx;
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DMA_HandleTypeDef hdma_usart1_tx;
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DMA_HandleTypeDef hdma_usart1_rx;
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DMA_HandleTypeDef hdma_usart2_rx;
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DMA_HandleTypeDef hdma_usart2_tx;
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DMA_HandleTypeDef hdma_usart3_tx;
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DMA_HandleTypeDef hdma_usart3_rx;
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DMA_HandleTypeDef hdma_usart10_rx;
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@ -56,7 +47,7 @@ void MX_UART5_Init(void)
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huart5.Instance = UART5;
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huart5.Init.BaudRate = 100000;
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huart5.Init.WordLength = UART_WORDLENGTH_9B;
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huart5.Init.StopBits = UART_STOPBITS_1;
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huart5.Init.StopBits = UART_STOPBITS_2;
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huart5.Init.Parity = UART_PARITY_EVEN;
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huart5.Init.Mode = UART_MODE_TX_RX;
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huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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@ -84,137 +75,6 @@ void MX_UART5_Init(void)
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/* USER CODE END UART5_Init 2 */
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}
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/* UART7 init function */
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void MX_UART7_Init(void)
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{
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/* USER CODE BEGIN UART7_Init 0 */
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/* USER CODE END UART7_Init 0 */
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/* USER CODE BEGIN UART7_Init 1 */
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/* USER CODE END UART7_Init 1 */
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huart7.Instance = UART7;
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huart7.Init.BaudRate = 115200;
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huart7.Init.WordLength = UART_WORDLENGTH_8B;
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huart7.Init.StopBits = UART_STOPBITS_1;
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huart7.Init.Parity = UART_PARITY_NONE;
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huart7.Init.Mode = UART_MODE_TX_RX;
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huart7.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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huart7.Init.OverSampling = UART_OVERSAMPLING_16;
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huart7.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
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huart7.Init.ClockPrescaler = UART_PRESCALER_DIV1;
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huart7.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
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if (HAL_UART_Init(&huart7) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_UARTEx_SetTxFifoThreshold(&huart7, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_UARTEx_SetRxFifoThreshold(&huart7, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_UARTEx_DisableFifoMode(&huart7) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN UART7_Init 2 */
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/* USER CODE END UART7_Init 2 */
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}
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/* USART1 init function */
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void MX_USART1_UART_Init(void)
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{
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/* USER CODE BEGIN USART1_Init 0 */
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/* USER CODE END USART1_Init 0 */
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/* USER CODE BEGIN USART1_Init 1 */
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/* USER CODE END USART1_Init 1 */
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huart1.Instance = USART1;
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huart1.Init.BaudRate = 115200;
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huart1.Init.WordLength = UART_WORDLENGTH_8B;
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huart1.Init.StopBits = UART_STOPBITS_1;
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huart1.Init.Parity = UART_PARITY_NONE;
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huart1.Init.Mode = UART_MODE_TX_RX;
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huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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huart1.Init.OverSampling = UART_OVERSAMPLING_16;
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huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
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huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
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huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
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if (HAL_UART_Init(&huart1) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN USART1_Init 2 */
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/* USER CODE END USART1_Init 2 */
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}
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/* USART2 init function */
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void MX_USART2_UART_Init(void)
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{
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/* USER CODE BEGIN USART2_Init 0 */
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/* USER CODE END USART2_Init 0 */
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/* USER CODE BEGIN USART2_Init 1 */
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/* USER CODE END USART2_Init 1 */
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huart2.Instance = USART2;
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||||
huart2.Init.BaudRate = 115200;
|
||||
huart2.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
huart2.Init.StopBits = UART_STOPBITS_1;
|
||||
huart2.Init.Parity = UART_PARITY_NONE;
|
||||
huart2.Init.Mode = UART_MODE_TX_RX;
|
||||
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||
huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||
huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
|
||||
huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||
if (HAL_RS485Ex_Init(&huart2, UART_DE_POLARITY_HIGH, 0, 0) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN USART2_Init 2 */
|
||||
|
||||
/* USER CODE END USART2_Init 2 */
|
||||
|
||||
}
|
||||
/* USART3 init function */
|
||||
|
||||
|
|
@ -357,8 +217,8 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
|||
hdma_uart5_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_uart5_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_uart5_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_uart5_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_uart5_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_uart5_rx.Init.Mode = DMA_CIRCULAR;
|
||||
hdma_uart5_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
|
||||
hdma_uart5_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_uart5_rx) != HAL_OK)
|
||||
{
|
||||
|
|
@ -374,229 +234,6 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
|||
|
||||
/* USER CODE END UART5_MspInit 1 */
|
||||
}
|
||||
else if(uartHandle->Instance==UART7)
|
||||
{
|
||||
/* USER CODE BEGIN UART7_MspInit 0 */
|
||||
|
||||
/* USER CODE END UART7_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART7;
|
||||
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* UART7 clock enable */
|
||||
__HAL_RCC_UART7_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
/**UART7 GPIO Configuration
|
||||
PE7 ------> UART7_RX
|
||||
PE8 ------> UART7_TX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_UART7;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
/* UART7 DMA Init */
|
||||
/* UART7_RX Init */
|
||||
hdma_uart7_rx.Instance = DMA1_Stream7;
|
||||
hdma_uart7_rx.Init.Request = DMA_REQUEST_UART7_RX;
|
||||
hdma_uart7_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_uart7_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_uart7_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_uart7_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_uart7_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_uart7_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_uart7_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_uart7_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_uart7_rx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(uartHandle,hdmarx,hdma_uart7_rx);
|
||||
|
||||
/* UART7_TX Init */
|
||||
hdma_uart7_tx.Instance = DMA2_Stream0;
|
||||
hdma_uart7_tx.Init.Request = DMA_REQUEST_UART7_TX;
|
||||
hdma_uart7_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_uart7_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_uart7_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_uart7_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_uart7_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_uart7_tx.Init.Mode = DMA_NORMAL;
|
||||
hdma_uart7_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_uart7_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_uart7_tx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(uartHandle,hdmatx,hdma_uart7_tx);
|
||||
|
||||
/* UART7 interrupt Init */
|
||||
HAL_NVIC_SetPriority(UART7_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(UART7_IRQn);
|
||||
/* USER CODE BEGIN UART7_MspInit 1 */
|
||||
|
||||
/* USER CODE END UART7_MspInit 1 */
|
||||
}
|
||||
else if(uartHandle->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
|
||||
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16910CLKSOURCE_D2PCLK2;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* USART1 clock enable */
|
||||
__HAL_RCC_USART1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**USART1 GPIO Configuration
|
||||
PA9 ------> USART1_TX
|
||||
PA10 ------> USART1_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USART1 DMA Init */
|
||||
/* USART1_TX Init */
|
||||
hdma_usart1_tx.Instance = DMA1_Stream5;
|
||||
hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
|
||||
hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_usart1_tx.Init.Mode = DMA_NORMAL;
|
||||
hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx);
|
||||
|
||||
/* USART1_RX Init */
|
||||
hdma_usart1_rx.Instance = DMA1_Stream6;
|
||||
hdma_usart1_rx.Init.Request = DMA_REQUEST_USART1_RX;
|
||||
hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_usart1_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart1_rx);
|
||||
|
||||
/* USART1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(USART1_IRQn);
|
||||
/* USER CODE BEGIN USART1_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 1 */
|
||||
}
|
||||
else if(uartHandle->Instance==USART2)
|
||||
{
|
||||
/* USER CODE BEGIN USART2_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART2_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
|
||||
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* USART2 clock enable */
|
||||
__HAL_RCC_USART2_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
/**USART2 GPIO Configuration
|
||||
PD4 ------> USART2_DE
|
||||
PD5 ------> USART2_TX
|
||||
PD6 ------> USART2_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
/* USART2 DMA Init */
|
||||
/* USART2_RX Init */
|
||||
hdma_usart2_rx.Instance = DMA2_Stream1;
|
||||
hdma_usart2_rx.Init.Request = DMA_REQUEST_USART2_RX;
|
||||
hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_usart2_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_usart2_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_usart2_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart2_rx);
|
||||
|
||||
/* USART2_TX Init */
|
||||
hdma_usart2_tx.Instance = DMA2_Stream2;
|
||||
hdma_usart2_tx.Init.Request = DMA_REQUEST_USART2_TX;
|
||||
hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_usart2_tx.Init.Mode = DMA_NORMAL;
|
||||
hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_usart2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx);
|
||||
|
||||
/* USART2 interrupt Init */
|
||||
HAL_NVIC_SetPriority(USART2_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(USART2_IRQn);
|
||||
/* USER CODE BEGIN USART2_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART2_MspInit 1 */
|
||||
}
|
||||
else if(uartHandle->Instance==USART3)
|
||||
{
|
||||
/* USER CODE BEGIN USART3_MspInit 0 */
|
||||
|
|
@ -791,79 +428,6 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
|||
|
||||
/* USER CODE END UART5_MspDeInit 1 */
|
||||
}
|
||||
else if(uartHandle->Instance==UART7)
|
||||
{
|
||||
/* USER CODE BEGIN UART7_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END UART7_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_UART7_CLK_DISABLE();
|
||||
|
||||
/**UART7 GPIO Configuration
|
||||
PE7 ------> UART7_RX
|
||||
PE8 ------> UART7_TX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8);
|
||||
|
||||
/* UART7 DMA DeInit */
|
||||
HAL_DMA_DeInit(uartHandle->hdmarx);
|
||||
HAL_DMA_DeInit(uartHandle->hdmatx);
|
||||
|
||||
/* UART7 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(UART7_IRQn);
|
||||
/* USER CODE BEGIN UART7_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END UART7_MspDeInit 1 */
|
||||
}
|
||||
else if(uartHandle->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART1_CLK_DISABLE();
|
||||
|
||||
/**USART1 GPIO Configuration
|
||||
PA9 ------> USART1_TX
|
||||
PA10 ------> USART1_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
|
||||
|
||||
/* USART1 DMA DeInit */
|
||||
HAL_DMA_DeInit(uartHandle->hdmatx);
|
||||
HAL_DMA_DeInit(uartHandle->hdmarx);
|
||||
|
||||
/* USART1 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(USART1_IRQn);
|
||||
/* USER CODE BEGIN USART1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 1 */
|
||||
}
|
||||
else if(uartHandle->Instance==USART2)
|
||||
{
|
||||
/* USER CODE BEGIN USART2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART2_CLK_DISABLE();
|
||||
|
||||
/**USART2 GPIO Configuration
|
||||
PD4 ------> USART2_DE
|
||||
PD5 ------> USART2_TX
|
||||
PD6 ------> USART2_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6);
|
||||
|
||||
/* USART2 DMA DeInit */
|
||||
HAL_DMA_DeInit(uartHandle->hdmarx);
|
||||
HAL_DMA_DeInit(uartHandle->hdmatx);
|
||||
|
||||
/* USART2 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(USART2_IRQn);
|
||||
/* USER CODE BEGIN USART2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART2_MspDeInit 1 */
|
||||
}
|
||||
else if(uartHandle->Instance==USART3)
|
||||
{
|
||||
/* USER CODE BEGIN USART3_MspDeInit 0 */
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -1,192 +1,254 @@
|
|||
# ninja log v5
|
||||
1947 4037 7567472048689429 CMakeFiles/scara_engineering.elf.dir/Core/Src/tim.c.obj 4980ce05e4e08a5f
|
||||
5363 7536 7567472087069746 CMakeFiles/scara_engineering.elf.dir/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c.obj 16f6678825dd2572
|
||||
3676 5796 7567472067300607 CMakeFiles/scara_engineering.elf.dir/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c.obj 16207e0b118d8ab7
|
||||
8726 9372 7567472116482425 CMakeFiles/scara_engineering.elf.dir/Middlewares/Third_Party/SEGGER/RTT/SEGGER_RTT_printf.c.obj c0e5e19d4a381730
|
||||
4794 6952 7567472077669995 CMakeFiles/scara_engineering.elf.dir/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c.obj 9dd38f18b9031c2d
|
||||
94 1946 7567472028913904 CMakeFiles/scara_engineering.elf.dir/Core/Src/gpio.c.obj 2ebdd72ddcbe3b72
|
||||
1657 3675 7567472046261719 CMakeFiles/scara_engineering.elf.dir/Core/Src/system_stm32h7xx.c.obj 81b507759f851738
|
||||
2228 4286 7567472052452296 CMakeFiles/scara_engineering.elf.dir/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c.obj aa72b65d540cec11
|
||||
1237 3281 7567472041469932 CMakeFiles/scara_engineering.elf.dir/Core/Src/sysmem.c.obj b1bfe5f76f038bf9
|
||||
5796 8018 7567472088784901 CMakeFiles/scara_engineering.elf.dir/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c.obj 3eaff3267d190d16
|
||||
399 2376 7567472032942755 CMakeFiles/scara_engineering.elf.dir/Core/Src/memorymap.c.obj 1d93f0f663d42474
|
||||
968 2994 7567472038536478 CMakeFiles/scara_engineering.elf.dir/Core/Src/stm32h7xx_hal_timebase_tim.c.obj 685d1a8483422617
|
||||
7386 9308 7567472102678335 CMakeFiles/scara_engineering.elf.dir/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c.obj dd60665beaa94f2e
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|
||||
TableHeader="TargetExceptionDialog", SortCol="Name", SortOrder="ASCENDING", VisibleCols=["Name";"Value";"Address";"Description"], ColWidths=[200;100;100;359]
|
||||
TableHeader="Registers 1", SortCol="Name", SortOrder="ASCENDING", VisibleCols=["Name";"Value";"Description"], ColWidths=[100;118;152]
|
||||
WatchedExpression="usart_instance", Window=Watched Data 1
|
||||
WatchedExpression="rc_ctrl", RefreshRate=2, Window=Watched Data 1
|
||||
WatchedExpression="rc_ctrl", RefreshRate=2, Window=Watched Data 1
|
||||
WatchedExpression="rc_usart_instance", RefreshRate=2, Window=Watched Data 1
|
||||
|
|
@ -34,7 +34,7 @@ static void RectifyRCjoystick()
|
|||
*/
|
||||
static void sbus_to_rc(const uint8_t *sbus_buf)
|
||||
{
|
||||
// 摇杆,直接解算时减去偏置,tiaoshi
|
||||
// 摇杆,直接解算时减去偏置
|
||||
rc_ctrl[TEMP].rc.rocker_r_ = ((sbus_buf[0] | (sbus_buf[1] << 8)) & 0x07ff) - RC_CH_VALUE_OFFSET; //!< Channel 0
|
||||
rc_ctrl[TEMP].rc.rocker_r1 = (((sbus_buf[1] >> 3) | (sbus_buf[2] << 5)) & 0x07ff) - RC_CH_VALUE_OFFSET; //!< Channel 1
|
||||
rc_ctrl[TEMP].rc.rocker_l_ = (((sbus_buf[2] >> 6) | (sbus_buf[3] << 2) | (sbus_buf[4] << 10)) & 0x07ff) - RC_CH_VALUE_OFFSET; //!< Channel 2
|
||||
|
|
|
|||
|
|
@ -6,108 +6,66 @@ CORTEX_M7.IPParameters=default_mode_Activation
|
|||
CORTEX_M7.default_mode_Activation=1
|
||||
Dma.Request0=USART3_TX
|
||||
Dma.Request1=USART3_RX
|
||||
Dma.Request10=SPI1_RX
|
||||
Dma.Request11=SPI1_TX
|
||||
Dma.Request12=UART5_RX
|
||||
Dma.Request2=USART10_RX
|
||||
Dma.Request3=USART10_TX
|
||||
Dma.Request4=USART1_TX
|
||||
Dma.Request5=USART1_RX
|
||||
Dma.Request6=UART7_RX
|
||||
Dma.Request7=UART7_TX
|
||||
Dma.Request8=USART2_RX
|
||||
Dma.Request9=USART2_TX
|
||||
Dma.RequestsNb=13
|
||||
Dma.SPI1_RX.10.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.SPI1_RX.10.EventEnable=DISABLE
|
||||
Dma.SPI1_RX.10.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.SPI1_RX.10.Instance=DMA2_Stream3
|
||||
Dma.SPI1_RX.10.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.SPI1_RX.10.MemInc=DMA_MINC_ENABLE
|
||||
Dma.SPI1_RX.10.Mode=DMA_NORMAL
|
||||
Dma.SPI1_RX.10.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.SPI1_RX.10.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.SPI1_RX.10.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.SPI1_RX.10.Priority=DMA_PRIORITY_LOW
|
||||
Dma.SPI1_RX.10.RequestNumber=1
|
||||
Dma.SPI1_RX.10.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.SPI1_RX.10.SignalID=NONE
|
||||
Dma.SPI1_RX.10.SyncEnable=DISABLE
|
||||
Dma.SPI1_RX.10.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.SPI1_RX.10.SyncRequestNumber=1
|
||||
Dma.SPI1_RX.10.SyncSignalID=NONE
|
||||
Dma.SPI1_TX.11.Direction=DMA_MEMORY_TO_PERIPH
|
||||
Dma.SPI1_TX.11.EventEnable=DISABLE
|
||||
Dma.SPI1_TX.11.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.SPI1_TX.11.Instance=DMA2_Stream4
|
||||
Dma.SPI1_TX.11.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.SPI1_TX.11.MemInc=DMA_MINC_ENABLE
|
||||
Dma.SPI1_TX.11.Mode=DMA_NORMAL
|
||||
Dma.SPI1_TX.11.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.SPI1_TX.11.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.SPI1_TX.11.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.SPI1_TX.11.Priority=DMA_PRIORITY_LOW
|
||||
Dma.SPI1_TX.11.RequestNumber=1
|
||||
Dma.SPI1_TX.11.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.SPI1_TX.11.SignalID=NONE
|
||||
Dma.SPI1_TX.11.SyncEnable=DISABLE
|
||||
Dma.SPI1_TX.11.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.SPI1_TX.11.SyncRequestNumber=1
|
||||
Dma.SPI1_TX.11.SyncSignalID=NONE
|
||||
Dma.UART5_RX.12.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.UART5_RX.12.EventEnable=DISABLE
|
||||
Dma.UART5_RX.12.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.UART5_RX.12.Instance=DMA1_Stream0
|
||||
Dma.UART5_RX.12.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.UART5_RX.12.MemInc=DMA_MINC_ENABLE
|
||||
Dma.UART5_RX.12.Mode=DMA_NORMAL
|
||||
Dma.UART5_RX.12.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.UART5_RX.12.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.UART5_RX.12.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.UART5_RX.12.Priority=DMA_PRIORITY_LOW
|
||||
Dma.UART5_RX.12.RequestNumber=1
|
||||
Dma.UART5_RX.12.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.UART5_RX.12.SignalID=NONE
|
||||
Dma.UART5_RX.12.SyncEnable=DISABLE
|
||||
Dma.UART5_RX.12.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.UART5_RX.12.SyncRequestNumber=1
|
||||
Dma.UART5_RX.12.SyncSignalID=NONE
|
||||
Dma.UART7_RX.6.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.UART7_RX.6.EventEnable=DISABLE
|
||||
Dma.UART7_RX.6.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.UART7_RX.6.Instance=DMA1_Stream7
|
||||
Dma.UART7_RX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.UART7_RX.6.MemInc=DMA_MINC_ENABLE
|
||||
Dma.UART7_RX.6.Mode=DMA_NORMAL
|
||||
Dma.UART7_RX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.UART7_RX.6.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.UART7_RX.6.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.UART7_RX.6.Priority=DMA_PRIORITY_LOW
|
||||
Dma.UART7_RX.6.RequestNumber=1
|
||||
Dma.UART7_RX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.UART7_RX.6.SignalID=NONE
|
||||
Dma.UART7_RX.6.SyncEnable=DISABLE
|
||||
Dma.UART7_RX.6.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.UART7_RX.6.SyncRequestNumber=1
|
||||
Dma.UART7_RX.6.SyncSignalID=NONE
|
||||
Dma.UART7_TX.7.Direction=DMA_MEMORY_TO_PERIPH
|
||||
Dma.UART7_TX.7.EventEnable=DISABLE
|
||||
Dma.UART7_TX.7.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.UART7_TX.7.Instance=DMA2_Stream0
|
||||
Dma.UART7_TX.7.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.UART7_TX.7.MemInc=DMA_MINC_ENABLE
|
||||
Dma.UART7_TX.7.Mode=DMA_NORMAL
|
||||
Dma.UART7_TX.7.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.UART7_TX.7.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.UART7_TX.7.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.UART7_TX.7.Priority=DMA_PRIORITY_LOW
|
||||
Dma.UART7_TX.7.RequestNumber=1
|
||||
Dma.UART7_TX.7.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.UART7_TX.7.SignalID=NONE
|
||||
Dma.UART7_TX.7.SyncEnable=DISABLE
|
||||
Dma.UART7_TX.7.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.UART7_TX.7.SyncRequestNumber=1
|
||||
Dma.UART7_TX.7.SyncSignalID=NONE
|
||||
Dma.Request4=SPI1_RX
|
||||
Dma.Request5=SPI1_TX
|
||||
Dma.Request6=UART5_RX
|
||||
Dma.RequestsNb=7
|
||||
Dma.SPI1_RX.4.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.SPI1_RX.4.EventEnable=DISABLE
|
||||
Dma.SPI1_RX.4.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.SPI1_RX.4.Instance=DMA2_Stream3
|
||||
Dma.SPI1_RX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.SPI1_RX.4.MemInc=DMA_MINC_ENABLE
|
||||
Dma.SPI1_RX.4.Mode=DMA_NORMAL
|
||||
Dma.SPI1_RX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.SPI1_RX.4.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.SPI1_RX.4.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.SPI1_RX.4.Priority=DMA_PRIORITY_LOW
|
||||
Dma.SPI1_RX.4.RequestNumber=1
|
||||
Dma.SPI1_RX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.SPI1_RX.4.SignalID=NONE
|
||||
Dma.SPI1_RX.4.SyncEnable=DISABLE
|
||||
Dma.SPI1_RX.4.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.SPI1_RX.4.SyncRequestNumber=1
|
||||
Dma.SPI1_RX.4.SyncSignalID=NONE
|
||||
Dma.SPI1_TX.5.Direction=DMA_MEMORY_TO_PERIPH
|
||||
Dma.SPI1_TX.5.EventEnable=DISABLE
|
||||
Dma.SPI1_TX.5.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.SPI1_TX.5.Instance=DMA2_Stream4
|
||||
Dma.SPI1_TX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.SPI1_TX.5.MemInc=DMA_MINC_ENABLE
|
||||
Dma.SPI1_TX.5.Mode=DMA_NORMAL
|
||||
Dma.SPI1_TX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.SPI1_TX.5.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.SPI1_TX.5.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.SPI1_TX.5.Priority=DMA_PRIORITY_LOW
|
||||
Dma.SPI1_TX.5.RequestNumber=1
|
||||
Dma.SPI1_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.SPI1_TX.5.SignalID=NONE
|
||||
Dma.SPI1_TX.5.SyncEnable=DISABLE
|
||||
Dma.SPI1_TX.5.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.SPI1_TX.5.SyncRequestNumber=1
|
||||
Dma.SPI1_TX.5.SyncSignalID=NONE
|
||||
Dma.UART5_RX.6.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.UART5_RX.6.EventEnable=DISABLE
|
||||
Dma.UART5_RX.6.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.UART5_RX.6.Instance=DMA1_Stream0
|
||||
Dma.UART5_RX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.UART5_RX.6.MemInc=DMA_MINC_ENABLE
|
||||
Dma.UART5_RX.6.Mode=DMA_CIRCULAR
|
||||
Dma.UART5_RX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.UART5_RX.6.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.UART5_RX.6.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.UART5_RX.6.Priority=DMA_PRIORITY_VERY_HIGH
|
||||
Dma.UART5_RX.6.RequestNumber=1
|
||||
Dma.UART5_RX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.UART5_RX.6.SignalID=NONE
|
||||
Dma.UART5_RX.6.SyncEnable=DISABLE
|
||||
Dma.UART5_RX.6.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.UART5_RX.6.SyncRequestNumber=1
|
||||
Dma.UART5_RX.6.SyncSignalID=NONE
|
||||
Dma.USART10_RX.2.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.USART10_RX.2.EventEnable=DISABLE
|
||||
Dma.USART10_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
|
|
@ -144,78 +102,6 @@ Dma.USART10_TX.3.SyncEnable=DISABLE
|
|||
Dma.USART10_TX.3.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.USART10_TX.3.SyncRequestNumber=1
|
||||
Dma.USART10_TX.3.SyncSignalID=NONE
|
||||
Dma.USART1_RX.5.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.USART1_RX.5.EventEnable=DISABLE
|
||||
Dma.USART1_RX.5.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.USART1_RX.5.Instance=DMA1_Stream6
|
||||
Dma.USART1_RX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.USART1_RX.5.MemInc=DMA_MINC_ENABLE
|
||||
Dma.USART1_RX.5.Mode=DMA_NORMAL
|
||||
Dma.USART1_RX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.USART1_RX.5.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.USART1_RX.5.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.USART1_RX.5.Priority=DMA_PRIORITY_LOW
|
||||
Dma.USART1_RX.5.RequestNumber=1
|
||||
Dma.USART1_RX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.USART1_RX.5.SignalID=NONE
|
||||
Dma.USART1_RX.5.SyncEnable=DISABLE
|
||||
Dma.USART1_RX.5.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.USART1_RX.5.SyncRequestNumber=1
|
||||
Dma.USART1_RX.5.SyncSignalID=NONE
|
||||
Dma.USART1_TX.4.Direction=DMA_MEMORY_TO_PERIPH
|
||||
Dma.USART1_TX.4.EventEnable=DISABLE
|
||||
Dma.USART1_TX.4.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.USART1_TX.4.Instance=DMA1_Stream5
|
||||
Dma.USART1_TX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.USART1_TX.4.MemInc=DMA_MINC_ENABLE
|
||||
Dma.USART1_TX.4.Mode=DMA_NORMAL
|
||||
Dma.USART1_TX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.USART1_TX.4.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.USART1_TX.4.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.USART1_TX.4.Priority=DMA_PRIORITY_LOW
|
||||
Dma.USART1_TX.4.RequestNumber=1
|
||||
Dma.USART1_TX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.USART1_TX.4.SignalID=NONE
|
||||
Dma.USART1_TX.4.SyncEnable=DISABLE
|
||||
Dma.USART1_TX.4.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.USART1_TX.4.SyncRequestNumber=1
|
||||
Dma.USART1_TX.4.SyncSignalID=NONE
|
||||
Dma.USART2_RX.8.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.USART2_RX.8.EventEnable=DISABLE
|
||||
Dma.USART2_RX.8.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.USART2_RX.8.Instance=DMA2_Stream1
|
||||
Dma.USART2_RX.8.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.USART2_RX.8.MemInc=DMA_MINC_ENABLE
|
||||
Dma.USART2_RX.8.Mode=DMA_NORMAL
|
||||
Dma.USART2_RX.8.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.USART2_RX.8.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.USART2_RX.8.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.USART2_RX.8.Priority=DMA_PRIORITY_LOW
|
||||
Dma.USART2_RX.8.RequestNumber=1
|
||||
Dma.USART2_RX.8.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.USART2_RX.8.SignalID=NONE
|
||||
Dma.USART2_RX.8.SyncEnable=DISABLE
|
||||
Dma.USART2_RX.8.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.USART2_RX.8.SyncRequestNumber=1
|
||||
Dma.USART2_RX.8.SyncSignalID=NONE
|
||||
Dma.USART2_TX.9.Direction=DMA_MEMORY_TO_PERIPH
|
||||
Dma.USART2_TX.9.EventEnable=DISABLE
|
||||
Dma.USART2_TX.9.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.USART2_TX.9.Instance=DMA2_Stream2
|
||||
Dma.USART2_TX.9.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.USART2_TX.9.MemInc=DMA_MINC_ENABLE
|
||||
Dma.USART2_TX.9.Mode=DMA_NORMAL
|
||||
Dma.USART2_TX.9.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.USART2_TX.9.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.USART2_TX.9.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.USART2_TX.9.Priority=DMA_PRIORITY_LOW
|
||||
Dma.USART2_TX.9.RequestNumber=1
|
||||
Dma.USART2_TX.9.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.USART2_TX.9.SignalID=NONE
|
||||
Dma.USART2_TX.9.SyncEnable=DISABLE
|
||||
Dma.USART2_TX.9.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.USART2_TX.9.SyncRequestNumber=1
|
||||
Dma.USART2_TX.9.SyncSignalID=NONE
|
||||
Dma.USART3_RX.1.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.USART3_RX.1.EventEnable=DISABLE
|
||||
Dma.USART3_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
|
|
@ -375,14 +261,11 @@ Mcu.IP15=TIM2
|
|||
Mcu.IP16=TIM3
|
||||
Mcu.IP17=TIM12
|
||||
Mcu.IP18=UART5
|
||||
Mcu.IP19=UART7
|
||||
Mcu.IP19=USART3
|
||||
Mcu.IP2=DMA
|
||||
Mcu.IP20=USART1
|
||||
Mcu.IP21=USART2
|
||||
Mcu.IP22=USART3
|
||||
Mcu.IP23=USART10
|
||||
Mcu.IP24=USB_DEVICE
|
||||
Mcu.IP25=USB_OTG_HS
|
||||
Mcu.IP20=USART10
|
||||
Mcu.IP21=USB_DEVICE
|
||||
Mcu.IP22=USB_OTG_HS
|
||||
Mcu.IP3=FDCAN1
|
||||
Mcu.IP4=FDCAN2
|
||||
Mcu.IP5=FDCAN3
|
||||
|
|
@ -390,7 +273,7 @@ Mcu.IP6=FREERTOS
|
|||
Mcu.IP7=I2C2
|
||||
Mcu.IP8=MEMORYMAP
|
||||
Mcu.IP9=NVIC
|
||||
Mcu.IPNb=26
|
||||
Mcu.IPNb=23
|
||||
Mcu.Name=STM32H723VGTx
|
||||
Mcu.Package=LQFP100
|
||||
Mcu.Pin0=PE2
|
||||
|
|
@ -399,62 +282,59 @@ Mcu.Pin10=PA0
|
|||
Mcu.Pin11=PA2
|
||||
Mcu.Pin12=PA5
|
||||
Mcu.Pin13=PB1
|
||||
Mcu.Pin14=PE7
|
||||
Mcu.Pin15=PE8
|
||||
Mcu.Pin16=PE9
|
||||
Mcu.Pin17=PE10
|
||||
Mcu.Pin18=PE12
|
||||
Mcu.Pin19=PE13
|
||||
Mcu.Pin14=PE9
|
||||
Mcu.Pin15=PE10
|
||||
Mcu.Pin16=PE12
|
||||
Mcu.Pin17=PE13
|
||||
Mcu.Pin18=PE15
|
||||
Mcu.Pin19=PB10
|
||||
Mcu.Pin2=PC13
|
||||
Mcu.Pin20=PE15
|
||||
Mcu.Pin21=PB10
|
||||
Mcu.Pin22=PB11
|
||||
Mcu.Pin23=PB13
|
||||
Mcu.Pin24=PB14
|
||||
Mcu.Pin25=PB15
|
||||
Mcu.Pin26=PD8
|
||||
Mcu.Pin27=PD9
|
||||
Mcu.Pin28=PD10
|
||||
Mcu.Pin29=PD12
|
||||
Mcu.Pin20=PB11
|
||||
Mcu.Pin21=PB13
|
||||
Mcu.Pin22=PB14
|
||||
Mcu.Pin23=PB15
|
||||
Mcu.Pin24=PD8
|
||||
Mcu.Pin25=PD9
|
||||
Mcu.Pin26=PD10
|
||||
Mcu.Pin27=PD12
|
||||
Mcu.Pin28=PD13
|
||||
Mcu.Pin29=PA10
|
||||
Mcu.Pin3=PC14-OSC32_IN
|
||||
Mcu.Pin30=PD13
|
||||
Mcu.Pin31=PA9
|
||||
Mcu.Pin32=PA10
|
||||
Mcu.Pin33=PA11
|
||||
Mcu.Pin34=PA12
|
||||
Mcu.Pin35=PA13(JTMS/SWDIO)
|
||||
Mcu.Pin36=PA14(JTCK/SWCLK)
|
||||
Mcu.Pin37=PA15(JTDI)
|
||||
Mcu.Pin38=PC12
|
||||
Mcu.Pin39=PD0
|
||||
Mcu.Pin30=PA11
|
||||
Mcu.Pin31=PA12
|
||||
Mcu.Pin32=PA13(JTMS/SWDIO)
|
||||
Mcu.Pin33=PA14(JTCK/SWCLK)
|
||||
Mcu.Pin34=PA15(JTDI)
|
||||
Mcu.Pin35=PC12
|
||||
Mcu.Pin36=PD0
|
||||
Mcu.Pin37=PD1
|
||||
Mcu.Pin38=PD2
|
||||
Mcu.Pin39=PD4
|
||||
Mcu.Pin4=PH0-OSC_IN
|
||||
Mcu.Pin40=PD1
|
||||
Mcu.Pin41=PD2
|
||||
Mcu.Pin42=PD4
|
||||
Mcu.Pin43=PD5
|
||||
Mcu.Pin44=PD6
|
||||
Mcu.Pin45=PD7
|
||||
Mcu.Pin46=PB3(JTDO/TRACESWO)
|
||||
Mcu.Pin47=PB4(NJTRST)
|
||||
Mcu.Pin48=PB5
|
||||
Mcu.Pin49=PB6
|
||||
Mcu.Pin40=PD5
|
||||
Mcu.Pin41=PD6
|
||||
Mcu.Pin42=PD7
|
||||
Mcu.Pin43=PB3(JTDO/TRACESWO)
|
||||
Mcu.Pin44=PB4(NJTRST)
|
||||
Mcu.Pin45=PB5
|
||||
Mcu.Pin46=PB6
|
||||
Mcu.Pin47=VP_FREERTOS_VS_CMSIS_V1
|
||||
Mcu.Pin48=VP_SYS_VS_tim14
|
||||
Mcu.Pin49=VP_TIM1_VS_ControllerModeClock
|
||||
Mcu.Pin5=PH1-OSC_OUT
|
||||
Mcu.Pin50=VP_FREERTOS_VS_CMSIS_V1
|
||||
Mcu.Pin51=VP_SYS_VS_tim14
|
||||
Mcu.Pin52=VP_TIM1_VS_ControllerModeClock
|
||||
Mcu.Pin53=VP_TIM1_VS_ClockSourceITR
|
||||
Mcu.Pin54=VP_TIM2_VS_ControllerModeClock
|
||||
Mcu.Pin55=VP_TIM2_VS_ClockSourceITR
|
||||
Mcu.Pin56=VP_TIM12_VS_ControllerModeClock
|
||||
Mcu.Pin57=VP_TIM12_VS_ClockSourceITR
|
||||
Mcu.Pin58=VP_USB_DEVICE_VS_USB_DEVICE_CDC_HS
|
||||
Mcu.Pin59=VP_MEMORYMAP_VS_MEMORYMAP
|
||||
Mcu.Pin50=VP_TIM1_VS_ClockSourceITR
|
||||
Mcu.Pin51=VP_TIM2_VS_ControllerModeClock
|
||||
Mcu.Pin52=VP_TIM2_VS_ClockSourceITR
|
||||
Mcu.Pin53=VP_TIM12_VS_ControllerModeClock
|
||||
Mcu.Pin54=VP_TIM12_VS_ClockSourceITR
|
||||
Mcu.Pin55=VP_USB_DEVICE_VS_USB_DEVICE_CDC_HS
|
||||
Mcu.Pin56=VP_MEMORYMAP_VS_MEMORYMAP
|
||||
Mcu.Pin57=VP_STMicroelectronics.X-CUBE-ALGOBUILD_VS_DSPOoLibraryJjLibrary_1.4.0_1.4.0
|
||||
Mcu.Pin6=PC0
|
||||
Mcu.Pin60=VP_STMicroelectronics.X-CUBE-ALGOBUILD_VS_DSPOoLibraryJjLibrary_1.4.0_1.4.0
|
||||
Mcu.Pin7=PC1
|
||||
Mcu.Pin8=PC2_C
|
||||
Mcu.Pin9=PC3_C
|
||||
Mcu.PinsNb=61
|
||||
Mcu.PinsNb=58
|
||||
Mcu.ThirdParty0=STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0
|
||||
Mcu.ThirdPartyNb=1
|
||||
Mcu.UserConstants=
|
||||
|
|
@ -467,12 +347,6 @@ NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
|||
NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA2_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA2_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA2_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA2_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
|
|
@ -502,15 +376,11 @@ NVIC.TIM8_TRG_COM_TIM14_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true
|
|||
NVIC.TimeBase=TIM8_TRG_COM_TIM14_IRQn
|
||||
NVIC.TimeBaseIP=TIM14
|
||||
NVIC.UART5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.UART7_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.USART10_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.USART1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.USART2_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
PA0.Signal=S_TIM2_CH1_ETR
|
||||
PA10.Locked=true
|
||||
PA10.Mode=Asynchronous
|
||||
PA10.Signal=USART1_RX
|
||||
PA11.Mode=Device_Only_FS
|
||||
PA11.Signal=USB_OTG_HS_DM
|
||||
|
|
@ -529,8 +399,6 @@ PA5.GPIOParameters=GPIO_Label
|
|||
PA5.GPIO_Label=LCD_KEY
|
||||
PA5.Locked=true
|
||||
PA5.Signal=GPIO_Input
|
||||
PA9.Mode=Asynchronous
|
||||
PA9.Signal=USART1_TX
|
||||
PB1.Signal=S_TIM3_CH4
|
||||
PB10.Mode=I2C
|
||||
PB10.Signal=I2C2_SCL
|
||||
|
|
@ -595,13 +463,10 @@ PD2.Locked=true
|
|||
PD2.Mode=Asynchronous
|
||||
PD2.Signal=UART5_RX
|
||||
PD4.Locked=true
|
||||
PD4.Mode=Hardware Flow Control (RS485)
|
||||
PD4.Signal=USART2_DE
|
||||
PD5.Locked=true
|
||||
PD5.Mode=Asynchronous
|
||||
PD5.Signal=USART2_TX
|
||||
PD6.Locked=true
|
||||
PD6.Mode=Asynchronous
|
||||
PD6.Signal=USART2_RX
|
||||
PD7.Mode=Full_Duplex_Master
|
||||
PD7.Signal=SPI1_MOSI
|
||||
|
|
@ -630,10 +495,6 @@ PE2.Mode=Asynchronous
|
|||
PE2.Signal=USART10_RX
|
||||
PE3.Mode=Asynchronous
|
||||
PE3.Signal=USART10_TX
|
||||
PE7.Mode=Asynchronous
|
||||
PE7.Signal=UART7_RX
|
||||
PE8.Mode=Asynchronous
|
||||
PE8.Signal=UART7_TX
|
||||
PE9.Signal=S_TIM1_CH1
|
||||
PH0-OSC_IN.Mode=HSE-External-Oscillator
|
||||
PH0-OSC_IN.Signal=RCC_OSC_IN
|
||||
|
|
@ -795,17 +656,13 @@ TIM3.IPParameters=Channel-PWM Generation4 CH4,Prescaler,Period
|
|||
TIM3.Period=10000-1
|
||||
TIM3.Prescaler=24-1
|
||||
UART5.BaudRate=100000
|
||||
UART5.IPParameters=BaudRate,WordLength,Parity,Mode
|
||||
UART5.IPParameters=BaudRate,WordLength,Parity,Mode,StopBits
|
||||
UART5.Mode=MODE_TX_RX
|
||||
UART5.Parity=PARITY_EVEN
|
||||
UART5.StopBits=UART_STOPBITS_2
|
||||
UART5.WordLength=WORDLENGTH_9B
|
||||
USART1.IPParameters=VirtualMode-Asynchronous
|
||||
USART1.VirtualMode-Asynchronous=VM_ASYNC
|
||||
USART10.IPParameters=VirtualMode
|
||||
USART10.VirtualMode=VM_ASYNC
|
||||
USART2.IPParameters=VirtualMode-Asynchronous,VirtualMode-Hardware Flow Control (RS485)
|
||||
USART2.VirtualMode-Asynchronous=VM_ASYNC
|
||||
USART2.VirtualMode-Hardware\ Flow\ Control\ (RS485)=VM_ASYNC
|
||||
USART3.IPParameters=VirtualMode-Asynchronous,VirtualMode-Hardware Flow Control (RS485)
|
||||
USART3.VirtualMode-Asynchronous=VM_ASYNC
|
||||
USART3.VirtualMode-Hardware\ Flow\ Control\ (RS485)=VM_ASYNC
|
||||
|
|
|
|||
Loading…
Reference in New Issue