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首次提交
2024-12-22 16:15:37 +08:00
#MicroXplorer Configuration settings - do not modify
CAD.formats=
CAD.pinconfig=
CAD.provider=
CORTEX_M7.IPParameters=default_mode_Activation
CORTEX_M7.default_mode_Activation=1
修改IMU
2024-12-25 15:25:25 +08:00
Dma.Request0=USART3_TX
Dma.Request1=USART3_RX
Dma.Request10=SPI1_RX
Dma.Request11=SPI1_TX
Dma.Request12=UART5_RX
Dma.Request2=USART10_RX
Dma.Request3=USART10_TX
Dma.Request4=USART1_TX
Dma.Request5=USART1_RX
Dma.Request6=UART7_RX
Dma.Request7=UART7_TX
Dma.Request8=USART2_RX
Dma.Request9=USART2_TX
Dma.RequestsNb=13
Dma.SPI1_RX.10.Direction=DMA_PERIPH_TO_MEMORY
Dma.SPI1_RX.10.EventEnable=DISABLE
Dma.SPI1_RX.10.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.SPI1_RX.10.Instance=DMA2_Stream3
Dma.SPI1_RX.10.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.SPI1_RX.10.MemInc=DMA_MINC_ENABLE
Dma.SPI1_RX.10.Mode=DMA_NORMAL
Dma.SPI1_RX.10.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.SPI1_RX.10.PeriphInc=DMA_PINC_DISABLE
Dma.SPI1_RX.10.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.SPI1_RX.10.Priority=DMA_PRIORITY_LOW
Dma.SPI1_RX.10.RequestNumber=1
Dma.SPI1_RX.10.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.SPI1_RX.10.SignalID=NONE
Dma.SPI1_RX.10.SyncEnable=DISABLE
Dma.SPI1_RX.10.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.SPI1_RX.10.SyncRequestNumber=1
Dma.SPI1_RX.10.SyncSignalID=NONE
Dma.SPI1_TX.11.Direction=DMA_MEMORY_TO_PERIPH
Dma.SPI1_TX.11.EventEnable=DISABLE
Dma.SPI1_TX.11.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.SPI1_TX.11.Instance=DMA2_Stream4
Dma.SPI1_TX.11.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.SPI1_TX.11.MemInc=DMA_MINC_ENABLE
Dma.SPI1_TX.11.Mode=DMA_NORMAL
Dma.SPI1_TX.11.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.SPI1_TX.11.PeriphInc=DMA_PINC_DISABLE
Dma.SPI1_TX.11.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.SPI1_TX.11.Priority=DMA_PRIORITY_LOW
Dma.SPI1_TX.11.RequestNumber=1
Dma.SPI1_TX.11.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.SPI1_TX.11.SignalID=NONE
Dma.SPI1_TX.11.SyncEnable=DISABLE
Dma.SPI1_TX.11.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.SPI1_TX.11.SyncRequestNumber=1
Dma.SPI1_TX.11.SyncSignalID=NONE
Dma.UART5_RX.12.Direction=DMA_PERIPH_TO_MEMORY
Dma.UART5_RX.12.EventEnable=DISABLE
Dma.UART5_RX.12.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART5_RX.12.Instance=DMA1_Stream0
Dma.UART5_RX.12.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.UART5_RX.12.MemInc=DMA_MINC_ENABLE
Dma.UART5_RX.12.Mode=DMA_NORMAL
Dma.UART5_RX.12.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART5_RX.12.PeriphInc=DMA_PINC_DISABLE
Dma.UART5_RX.12.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.UART5_RX.12.Priority=DMA_PRIORITY_LOW
Dma.UART5_RX.12.RequestNumber=1
Dma.UART5_RX.12.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.UART5_RX.12.SignalID=NONE
Dma.UART5_RX.12.SyncEnable=DISABLE
Dma.UART5_RX.12.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.UART5_RX.12.SyncRequestNumber=1
Dma.UART5_RX.12.SyncSignalID=NONE
Dma.UART7_RX.6.Direction=DMA_PERIPH_TO_MEMORY
Dma.UART7_RX.6.EventEnable=DISABLE
Dma.UART7_RX.6.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART7_RX.6.Instance=DMA1_Stream7
Dma.UART7_RX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.UART7_RX.6.MemInc=DMA_MINC_ENABLE
Dma.UART7_RX.6.Mode=DMA_NORMAL
Dma.UART7_RX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART7_RX.6.PeriphInc=DMA_PINC_DISABLE
Dma.UART7_RX.6.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.UART7_RX.6.Priority=DMA_PRIORITY_LOW
Dma.UART7_RX.6.RequestNumber=1
Dma.UART7_RX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.UART7_RX.6.SignalID=NONE
Dma.UART7_RX.6.SyncEnable=DISABLE
Dma.UART7_RX.6.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.UART7_RX.6.SyncRequestNumber=1
Dma.UART7_RX.6.SyncSignalID=NONE
Dma.UART7_TX.7.Direction=DMA_MEMORY_TO_PERIPH
Dma.UART7_TX.7.EventEnable=DISABLE
Dma.UART7_TX.7.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART7_TX.7.Instance=DMA2_Stream0
Dma.UART7_TX.7.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.UART7_TX.7.MemInc=DMA_MINC_ENABLE
Dma.UART7_TX.7.Mode=DMA_NORMAL
Dma.UART7_TX.7.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART7_TX.7.PeriphInc=DMA_PINC_DISABLE
Dma.UART7_TX.7.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.UART7_TX.7.Priority=DMA_PRIORITY_LOW
Dma.UART7_TX.7.RequestNumber=1
Dma.UART7_TX.7.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.UART7_TX.7.SignalID=NONE
Dma.UART7_TX.7.SyncEnable=DISABLE
Dma.UART7_TX.7.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.UART7_TX.7.SyncRequestNumber=1
Dma.UART7_TX.7.SyncSignalID=NONE
Dma.USART10_RX.2.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART10_RX.2.EventEnable=DISABLE
Dma.USART10_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART10_RX.2.Instance=DMA1_Stream1
Dma.USART10_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART10_RX.2.MemInc=DMA_MINC_ENABLE
Dma.USART10_RX.2.Mode=DMA_NORMAL
Dma.USART10_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART10_RX.2.PeriphInc=DMA_PINC_DISABLE
Dma.USART10_RX.2.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART10_RX.2.Priority=DMA_PRIORITY_MEDIUM
Dma.USART10_RX.2.RequestNumber=1
Dma.USART10_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART10_RX.2.SignalID=NONE
Dma.USART10_RX.2.SyncEnable=DISABLE
Dma.USART10_RX.2.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART10_RX.2.SyncRequestNumber=1
Dma.USART10_RX.2.SyncSignalID=NONE
Dma.USART10_TX.3.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART10_TX.3.EventEnable=DISABLE
Dma.USART10_TX.3.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART10_TX.3.Instance=DMA1_Stream4
Dma.USART10_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART10_TX.3.MemInc=DMA_MINC_ENABLE
Dma.USART10_TX.3.Mode=DMA_NORMAL
Dma.USART10_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART10_TX.3.PeriphInc=DMA_PINC_DISABLE
Dma.USART10_TX.3.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART10_TX.3.Priority=DMA_PRIORITY_MEDIUM
Dma.USART10_TX.3.RequestNumber=1
Dma.USART10_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART10_TX.3.SignalID=NONE
Dma.USART10_TX.3.SyncEnable=DISABLE
Dma.USART10_TX.3.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART10_TX.3.SyncRequestNumber=1
Dma.USART10_TX.3.SyncSignalID=NONE
Dma.USART1_RX.5.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART1_RX.5.EventEnable=DISABLE
Dma.USART1_RX.5.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART1_RX.5.Instance=DMA1_Stream6
Dma.USART1_RX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART1_RX.5.MemInc=DMA_MINC_ENABLE
Dma.USART1_RX.5.Mode=DMA_NORMAL
Dma.USART1_RX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART1_RX.5.PeriphInc=DMA_PINC_DISABLE
Dma.USART1_RX.5.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART1_RX.5.Priority=DMA_PRIORITY_LOW
Dma.USART1_RX.5.RequestNumber=1
Dma.USART1_RX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART1_RX.5.SignalID=NONE
Dma.USART1_RX.5.SyncEnable=DISABLE
Dma.USART1_RX.5.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART1_RX.5.SyncRequestNumber=1
Dma.USART1_RX.5.SyncSignalID=NONE
Dma.USART1_TX.4.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART1_TX.4.EventEnable=DISABLE
Dma.USART1_TX.4.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART1_TX.4.Instance=DMA1_Stream5
Dma.USART1_TX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART1_TX.4.MemInc=DMA_MINC_ENABLE
Dma.USART1_TX.4.Mode=DMA_NORMAL
Dma.USART1_TX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART1_TX.4.PeriphInc=DMA_PINC_DISABLE
Dma.USART1_TX.4.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART1_TX.4.Priority=DMA_PRIORITY_LOW
Dma.USART1_TX.4.RequestNumber=1
Dma.USART1_TX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART1_TX.4.SignalID=NONE
Dma.USART1_TX.4.SyncEnable=DISABLE
Dma.USART1_TX.4.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART1_TX.4.SyncRequestNumber=1
Dma.USART1_TX.4.SyncSignalID=NONE
Dma.USART2_RX.8.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART2_RX.8.EventEnable=DISABLE
Dma.USART2_RX.8.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART2_RX.8.Instance=DMA2_Stream1
Dma.USART2_RX.8.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_RX.8.MemInc=DMA_MINC_ENABLE
Dma.USART2_RX.8.Mode=DMA_NORMAL
Dma.USART2_RX.8.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_RX.8.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_RX.8.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART2_RX.8.Priority=DMA_PRIORITY_LOW
Dma.USART2_RX.8.RequestNumber=1
Dma.USART2_RX.8.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART2_RX.8.SignalID=NONE
Dma.USART2_RX.8.SyncEnable=DISABLE
Dma.USART2_RX.8.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART2_RX.8.SyncRequestNumber=1
Dma.USART2_RX.8.SyncSignalID=NONE
Dma.USART2_TX.9.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART2_TX.9.EventEnable=DISABLE
Dma.USART2_TX.9.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART2_TX.9.Instance=DMA2_Stream2
Dma.USART2_TX.9.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_TX.9.MemInc=DMA_MINC_ENABLE
Dma.USART2_TX.9.Mode=DMA_NORMAL
Dma.USART2_TX.9.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_TX.9.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_TX.9.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART2_TX.9.Priority=DMA_PRIORITY_LOW
Dma.USART2_TX.9.RequestNumber=1
Dma.USART2_TX.9.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART2_TX.9.SignalID=NONE
Dma.USART2_TX.9.SyncEnable=DISABLE
Dma.USART2_TX.9.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART2_TX.9.SyncRequestNumber=1
Dma.USART2_TX.9.SyncSignalID=NONE
Dma.USART3_RX.1.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART3_RX.1.EventEnable=DISABLE
Dma.USART3_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_RX.1.Instance=DMA1_Stream3
Dma.USART3_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_RX.1.MemInc=DMA_MINC_ENABLE
Dma.USART3_RX.1.Mode=DMA_NORMAL
Dma.USART3_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_RX.1.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_RX.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART3_RX.1.Priority=DMA_PRIORITY_LOW
Dma.USART3_RX.1.RequestNumber=1
Dma.USART3_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART3_RX.1.SignalID=NONE
Dma.USART3_RX.1.SyncEnable=DISABLE
Dma.USART3_RX.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART3_RX.1.SyncRequestNumber=1
Dma.USART3_RX.1.SyncSignalID=NONE
Dma.USART3_TX.0.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART3_TX.0.EventEnable=DISABLE
Dma.USART3_TX.0.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_TX.0.Instance=DMA1_Stream2
Dma.USART3_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_TX.0.MemInc=DMA_MINC_ENABLE
Dma.USART3_TX.0.Mode=DMA_NORMAL
Dma.USART3_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_TX.0.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_TX.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART3_TX.0.Priority=DMA_PRIORITY_LOW
Dma.USART3_TX.0.RequestNumber=1
Dma.USART3_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART3_TX.0.SignalID=NONE
Dma.USART3_TX.0.SyncEnable=DISABLE
Dma.USART3_TX.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART3_TX.0.SyncRequestNumber=1
Dma.USART3_TX.0.SyncSignalID=NONE
首次提交
2024-12-22 16:15:37 +08:00
FDCAN1.CalculateBaudRateNominal=1000000
FDCAN1.CalculateTimeBitNominal=1000
FDCAN1.CalculateTimeQuantumNominal=25.0
FDCAN1.DataPrescaler=3
FDCAN1.DataSyncJumpWidth=10
FDCAN1.DataTimeSeg1=29
FDCAN1.DataTimeSeg2=10
FDCAN1.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,NominalSyncJumpWidth,DataPrescaler,DataSyncJumpWidth,DataTimeSeg1,DataTimeSeg2,StdFiltersNbr,RxFifo0ElmtsNbr,RxFifo1ElmtsNbr,TxFifoQueueElmtsNbr,NominalPrescaler,NominalTimeSeg1,NominalTimeSeg2
FDCAN1.NominalPrescaler=3
FDCAN1.NominalSyncJumpWidth=10
FDCAN1.NominalTimeSeg1=29
FDCAN1.NominalTimeSeg2=10
FDCAN1.RxFifo0ElmtsNbr=3
FDCAN1.RxFifo1ElmtsNbr=3
FDCAN1.StdFiltersNbr=1
FDCAN1.TxFifoQueueElmtsNbr=4
FDCAN2.CalculateBaudRateNominal=1000000
FDCAN2.CalculateTimeBitNominal=1000
FDCAN2.CalculateTimeQuantumNominal=25.0
FDCAN2.DataPrescaler=3
FDCAN2.DataSyncJumpWidth=10
FDCAN2.DataTimeSeg1=29
FDCAN2.DataTimeSeg2=10
FDCAN2.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,NominalSyncJumpWidth,DataPrescaler,DataSyncJumpWidth,DataTimeSeg1,DataTimeSeg2,MessageRAMOffset,StdFiltersNbr,RxFifo0ElmtsNbr,RxFifo1ElmtsNbr,TxFifoQueueElmtsNbr,NominalPrescaler,NominalTimeSeg1,NominalTimeSeg2
FDCAN2.MessageRAMOffset=853
FDCAN2.NominalPrescaler=3
FDCAN2.NominalSyncJumpWidth=10
FDCAN2.NominalTimeSeg1=29
FDCAN2.NominalTimeSeg2=10
FDCAN2.RxFifo0ElmtsNbr=3
FDCAN2.RxFifo1ElmtsNbr=3
FDCAN2.StdFiltersNbr=1
FDCAN2.TxFifoQueueElmtsNbr=4
FDCAN3.CalculateBaudRateNominal=1000000
FDCAN3.CalculateTimeBitNominal=1000
FDCAN3.CalculateTimeQuantumNominal=25.0
FDCAN3.DataPrescaler=3
FDCAN3.DataSyncJumpWidth=10
FDCAN3.DataTimeSeg1=29
FDCAN3.DataTimeSeg2=10
FDCAN3.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,NominalSyncJumpWidth,DataPrescaler,DataSyncJumpWidth,DataTimeSeg1,DataTimeSeg2,MessageRAMOffset,StdFiltersNbr,RxFifo0ElmtsNbr,RxFifo1ElmtsNbr,TxFifoQueueElmtsNbr,NominalPrescaler,NominalTimeSeg1,NominalTimeSeg2
FDCAN3.MessageRAMOffset=1707
FDCAN3.NominalPrescaler=3
FDCAN3.NominalSyncJumpWidth=10
FDCAN3.NominalTimeSeg1=29
FDCAN3.NominalTimeSeg2=10
FDCAN3.RxFifo0ElmtsNbr=3
FDCAN3.RxFifo1ElmtsNbr=3
FDCAN3.StdFiltersNbr=1
FDCAN3.TxFifoQueueElmtsNbr=4
FREERTOS.IPParameters=Tasks01,configUSE_NEWLIB_REENTRANT
FREERTOS.Tasks01=defaultTask,0,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL
FREERTOS.configUSE_NEWLIB_REENTRANT=0
File.Version=6
GPIO.groupedBy=Group By Peripherals
I2C2.IPParameters=Timing
I2C2.Timing=0x307075B1
KeepUserPlacement=false
MMTAppReg1.MEMORYMAP.AppRegionName=DTCMRAM
MMTAppReg1.MEMORYMAP.ContextName=Cortex-M7NS
MMTAppReg1.MEMORYMAP.CoreName=Arm Cortex-M7
MMTAppReg1.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name
MMTAppReg1.MEMORYMAP.Name=DTCMRAM
MMTAppReg1.MEMORYMAP.Size=131072
MMTAppReg1.MEMORYMAP.StartAddress=0x20000000
MMTAppReg2.MEMORYMAP.AppRegionName=RAM
MMTAppReg2.MEMORYMAP.ContextName=Cortex-M7NS
MMTAppReg2.MEMORYMAP.CoreName=Arm Cortex-M7
MMTAppReg2.MEMORYMAP.DefaultDataRegion=true
MMTAppReg2.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name,DefaultDataRegion
MMTAppReg2.MEMORYMAP.Name=RAM
MMTAppReg2.MEMORYMAP.Size=131072
MMTAppReg2.MEMORYMAP.StartAddress=0x24000000
MMTAppReg3.MEMORYMAP.AppRegionName=RAM_D2
MMTAppReg3.MEMORYMAP.ContextName=Cortex-M7NS
MMTAppReg3.MEMORYMAP.CoreName=Arm Cortex-M7
MMTAppReg3.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name
MMTAppReg3.MEMORYMAP.Name=RAM_D2
MMTAppReg3.MEMORYMAP.Size=32768
MMTAppReg3.MEMORYMAP.StartAddress=0x30000000
MMTAppReg4.MEMORYMAP.AppRegionName=RAM_D3
MMTAppReg4.MEMORYMAP.ContextName=Cortex-M7NS
MMTAppReg4.MEMORYMAP.CoreName=Arm Cortex-M7
MMTAppReg4.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name
MMTAppReg4.MEMORYMAP.Name=RAM_D3
MMTAppReg4.MEMORYMAP.Size=16384
MMTAppReg4.MEMORYMAP.StartAddress=0x38000000
MMTAppReg5.MEMORYMAP.AppRegionName=ITCMRAM
MMTAppReg5.MEMORYMAP.Cacheability=WTRA
MMTAppReg5.MEMORYMAP.ContextName=Cortex-M7NS
MMTAppReg5.MEMORYMAP.CoreName=Arm Cortex-M7
MMTAppReg5.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name,Cacheability
MMTAppReg5.MEMORYMAP.Name=ITCMRAM
MMTAppReg5.MEMORYMAP.Size=65536
MMTAppReg5.MEMORYMAP.StartAddress=0x00000000
MMTAppReg6.MEMORYMAP.AP=RO_priv_only
MMTAppReg6.MEMORYMAP.AppRegionName=FLASH
MMTAppReg6.MEMORYMAP.Cacheability=WTRA
MMTAppReg6.MEMORYMAP.ContextName=Cortex-M7NS
MMTAppReg6.MEMORYMAP.CoreName=Arm Cortex-M7
MMTAppReg6.MEMORYMAP.DefaultCodeRegion=true
MMTAppReg6.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,MemType,ContextName,Name,AP,Cacheability,DefaultCodeRegion,ISRRegion,RootBootRegion
MMTAppReg6.MEMORYMAP.ISRRegion=true
MMTAppReg6.MEMORYMAP.MemType=ROM
MMTAppReg6.MEMORYMAP.Name=FLASH
MMTAppReg6.MEMORYMAP.RootBootRegion=true
MMTAppReg6.MEMORYMAP.Size=1048576
MMTAppReg6.MEMORYMAP.StartAddress=0x08000000
MMTAppRegionsCount=6
MMTConfigApplied=false
Mcu.CPN=STM32H723VGT6
Mcu.Family=STM32H7
Mcu.IP0=CORTEX_M7
Mcu.IP1=DEBUG
修改报错
2024-12-23 18:13:22 +08:00
Mcu.IP10=RCC
Mcu.IP11=SPI1
Mcu.IP12=SPI2
Mcu.IP13=SYS
Mcu.IP14=TIM1
Mcu.IP15=TIM2
Mcu.IP16=TIM3
Mcu.IP17=TIM12
Mcu.IP18=UART5
Mcu.IP19=UART7
Mcu.IP2=DMA
Mcu.IP20=USART1
Mcu.IP21=USART2
Mcu.IP22=USART3
Mcu.IP23=USART10
Mcu.IP24=USB_DEVICE
Mcu.IP25=USB_OTG_HS
Mcu.IP3=FDCAN1
Mcu.IP4=FDCAN2
Mcu.IP5=FDCAN3
Mcu.IP6=FREERTOS
Mcu.IP7=I2C2
Mcu.IP8=MEMORYMAP
Mcu.IP9=NVIC
Mcu.IPNb=26
首次提交
2024-12-22 16:15:37 +08:00
Mcu.Name=STM32H723VGTx
Mcu.Package=LQFP100
Mcu.Pin0=PE2
Mcu.Pin1=PE3
Mcu.Pin10=PA0
Mcu.Pin11=PA2
Mcu.Pin12=PA5
Mcu.Pin13=PB1
Mcu.Pin14=PE7
Mcu.Pin15=PE8
Mcu.Pin16=PE9
Mcu.Pin17=PE10
Mcu.Pin18=PE12
Mcu.Pin19=PE13
Mcu.Pin2=PC13
Mcu.Pin20=PE15
Mcu.Pin21=PB10
Mcu.Pin22=PB11
Mcu.Pin23=PB13
Mcu.Pin24=PB14
Mcu.Pin25=PB15
Mcu.Pin26=PD8
Mcu.Pin27=PD9
Mcu.Pin28=PD10
Mcu.Pin29=PD12
Mcu.Pin3=PC14-OSC32_IN
Mcu.Pin30=PD13
Mcu.Pin31=PA9
Mcu.Pin32=PA10
Mcu.Pin33=PA11
Mcu.Pin34=PA12
Mcu.Pin35=PA13(JTMS/SWDIO)
Mcu.Pin36=PA14(JTCK/SWCLK)
Mcu.Pin37=PA15(JTDI)
Mcu.Pin38=PC12
Mcu.Pin39=PD0
Mcu.Pin4=PH0-OSC_IN
Mcu.Pin40=PD1
Mcu.Pin41=PD2
Mcu.Pin42=PD4
Mcu.Pin43=PD5
Mcu.Pin44=PD6
Mcu.Pin45=PD7
Mcu.Pin46=PB3(JTDO/TRACESWO)
Mcu.Pin47=PB4(NJTRST)
Mcu.Pin48=PB5
Mcu.Pin49=PB6
Mcu.Pin5=PH1-OSC_OUT
Mcu.Pin50=VP_FREERTOS_VS_CMSIS_V1
Mcu.Pin51=VP_SYS_VS_tim14
Mcu.Pin52=VP_TIM1_VS_ControllerModeClock
Mcu.Pin53=VP_TIM1_VS_ClockSourceITR
Mcu.Pin54=VP_TIM2_VS_ControllerModeClock
Mcu.Pin55=VP_TIM2_VS_ClockSourceITR
修改IMU
2024-12-25 15:25:25 +08:00
Mcu.Pin56=VP_TIM12_VS_ControllerModeClock
Mcu.Pin57=VP_TIM12_VS_ClockSourceITR
Mcu.Pin58=VP_USB_DEVICE_VS_USB_DEVICE_CDC_HS
Mcu.Pin59=VP_MEMORYMAP_VS_MEMORYMAP
首次提交
2024-12-22 16:15:37 +08:00
Mcu.Pin6=PC0
修改IMU
2024-12-25 15:25:25 +08:00
Mcu.Pin60=VP_STMicroelectronics.X-CUBE-ALGOBUILD_VS_DSPOoLibraryJjLibrary_1.4.0_1.4.0
首次提交
2024-12-22 16:15:37 +08:00
Mcu.Pin7=PC1
Mcu.Pin8=PC2_C
Mcu.Pin9=PC3_C
修改IMU
2024-12-25 15:25:25 +08:00
Mcu.PinsNb=61
首次提交
2024-12-22 16:15:37 +08:00
Mcu.ThirdParty0=STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0
Mcu.ThirdPartyNb=1
Mcu.UserConstants=
Mcu.UserName=STM32H723VGTx
MxCube.Version=6.12.1
MxDb.Version=DB.6.0.121
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
修改报错
2024-12-23 18:13:22 +08:00
NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
修改IMU
2024-12-25 15:25:25 +08:00
NVIC.DMA2_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
首次提交
2024-12-22 16:15:37 +08:00
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
NVIC.FDCAN1_IT0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
修改报错
2024-12-23 18:13:22 +08:00
NVIC.FDCAN1_IT1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
首次提交
2024-12-22 16:15:37 +08:00
NVIC.FDCAN2_IT0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
修改报错
2024-12-23 18:13:22 +08:00
NVIC.FDCAN2_IT1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
首次提交
2024-12-22 16:15:37 +08:00
NVIC.FDCAN3_IT0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
修改报错
2024-12-23 18:13:22 +08:00
NVIC.FDCAN3_IT1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.FDCAN_CAL_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
首次提交
2024-12-22 16:15:37 +08:00
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
修改报错
2024-12-23 18:13:22 +08:00
NVIC.OTG_HS_EP1_IN_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.OTG_HS_EP1_OUT_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
首次提交
2024-12-22 16:15:37 +08:00
NVIC.OTG_HS_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
修改IMU
2024-12-25 15:25:25 +08:00
NVIC.SPI1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
首次提交
2024-12-22 16:15:37 +08:00
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
NVIC.SavedPendsvIrqHandlerGenerated=true
NVIC.SavedSvcallIrqHandlerGenerated=true
NVIC.SavedSystickIrqHandlerGenerated=true
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false
NVIC.TIM8_TRG_COM_TIM14_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true
NVIC.TimeBase=TIM8_TRG_COM_TIM14_IRQn
NVIC.TimeBaseIP=TIM14
修改报错
2024-12-23 18:13:22 +08:00
NVIC.UART5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.UART7_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.USART10_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.USART1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.USART2_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
首次提交
2024-12-22 16:15:37 +08:00
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
PA0.Signal=S_TIM2_CH1_ETR
PA10.Locked=true
PA10.Mode=Asynchronous
PA10.Signal=USART1_RX
PA11.Mode=Device_Only_FS
PA11.Signal=USB_OTG_HS_DM
PA12.Mode=Device_Only_FS
PA12.Signal=USB_OTG_HS_DP
PA13(JTMS/SWDIO).Mode=Serial_Wire
PA13(JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
PA14(JTCK/SWCLK).Mode=Serial_Wire
PA14(JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
PA15(JTDI).GPIOParameters=GPIO_Label
PA15(JTDI).GPIO_Label=KEY
PA15(JTDI).Locked=true
PA15(JTDI).Signal=GPIO_Input
PA2.Signal=S_TIM2_CH3
PA5.GPIOParameters=GPIO_Label
PA5.GPIO_Label=LCD_KEY
PA5.Locked=true
PA5.Signal=GPIO_Input
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
PB1.Signal=S_TIM3_CH4
PB10.Mode=I2C
PB10.Signal=I2C2_SCL
PB11.Mode=I2C
PB11.Signal=I2C2_SDA
PB13.Mode=Full_Duplex_Master
PB13.Signal=SPI2_SCK
PB14.Mode=Hardware Flow Control (RS485)
PB14.Signal=USART3_DE
PB15.Signal=S_TIM12_CH2
PB3(JTDO/TRACESWO).Locked=true
PB3(JTDO/TRACESWO).Mode=Full_Duplex_Master
PB3(JTDO/TRACESWO).Signal=SPI1_SCK
PB4(NJTRST).Locked=true
PB4(NJTRST).Mode=Full_Duplex_Master
PB4(NJTRST).Signal=SPI1_MISO
PB5.Locked=true
PB5.Mode=FDCAN_Activate
PB5.Signal=FDCAN2_RX
PB6.Locked=true
PB6.Mode=FDCAN_Activate
PB6.Signal=FDCAN2_TX
PC0.GPIOParameters=GPIO_Speed,PinState,GPIO_Label
PC0.GPIO_Label=ACC_CS
PC0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PC0.Locked=true
PC0.PinState=GPIO_PIN_SET
PC0.Signal=GPIO_Output
PC1.Mode=Full_Duplex_Master
PC1.Signal=SPI2_MOSI
PC12.Mode=Asynchronous
PC12.Signal=UART5_TX
PC13.GPIOParameters=GPIO_Label
PC13.GPIO_Label=Power_OUT1_EN
PC13.Locked=true
PC13.Signal=GPIO_Output
PC14-OSC32_IN.Locked=true
PC14-OSC32_IN.Signal=GPIO_Output
PC2_C.Mode=Full_Duplex_Master
PC2_C.Signal=SPI2_MISO
PC3_C.GPIOParameters=GPIO_Speed,PinState,GPIO_Label
PC3_C.GPIO_Label=GYRO_CS
PC3_C.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PC3_C.Locked=true
PC3_C.PinState=GPIO_PIN_SET
PC3_C.Signal=GPIO_Output
PD0.Locked=true
PD0.Mode=FDCAN_Activate
PD0.Signal=FDCAN1_RX
PD1.Locked=true
PD1.Mode=FDCAN_Activate
PD1.Signal=FDCAN1_TX
PD10.GPIOParameters=GPIO_Label
PD10.GPIO_Label=LCD_GPIO
PD10.Locked=true
PD10.Signal=GPIO_Output
PD12.Mode=FDCAN_Activate
PD12.Signal=FDCAN3_RX
PD13.Mode=FDCAN_Activate
PD13.Signal=FDCAN3_TX
PD2.Locked=true
PD2.Mode=Asynchronous
PD2.Signal=UART5_RX
PD4.Locked=true
PD4.Mode=Hardware Flow Control (RS485)
PD4.Signal=USART2_DE
PD5.Locked=true
PD5.Mode=Asynchronous
PD5.Signal=USART2_TX
PD6.Locked=true
PD6.Mode=Asynchronous
PD6.Signal=USART2_RX
PD7.Mode=Full_Duplex_Master
PD7.Signal=SPI1_MOSI
PD8.Locked=true
PD8.Mode=Asynchronous
PD8.Signal=USART3_TX
PD9.Locked=true
PD9.Mode=Asynchronous
PD9.Signal=USART3_RX
PE10.GPIOParameters=GPIO_Label
PE10.GPIO_Label=ACC_INT
PE10.Locked=true
PE10.Signal=GPXTI10
PE12.GPIOParameters=GPIO_Label
PE12.GPIO_Label=GYRO_INT
PE12.Locked=true
PE12.Signal=GPXTI12
PE13.Signal=S_TIM1_CH3
PE15.GPIOParameters=GPIO_Speed,PinState,GPIO_Label
PE15.GPIO_Label=SPI1_CS
PE15.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PE15.Locked=true
PE15.PinState=GPIO_PIN_SET
PE15.Signal=GPIO_Output
PE2.Mode=Asynchronous
PE2.Signal=USART10_RX
PE3.Mode=Asynchronous
PE3.Signal=USART10_TX
PE7.Mode=Asynchronous
PE7.Signal=UART7_RX
PE8.Mode=Asynchronous
PE8.Signal=UART7_TX
PE9.Signal=S_TIM1_CH1
PH0-OSC_IN.Mode=HSE-External-Oscillator
PH0-OSC_IN.Signal=RCC_OSC_IN
PH1-OSC_OUT.Mode=HSE-External-Oscillator
PH1-OSC_OUT.Signal=RCC_OSC_OUT
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerOptimize=6
ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=true
ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32H723VGTx
ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.11.2
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=true
ProjectManager.LibraryCopy=1
ProjectManager.MainLocation=Core/Src
ProjectManager.NoMain=false
ProjectManager.PreviousToolchain=STM32CubeIDE
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=scara_engineering.ioc
ProjectManager.ProjectName=scara_engineering
ProjectManager.ProjectStructure=
ProjectManager.RegisterCallBack=
ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=STM32CubeIDE
ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=true
修改报错
2024-12-23 18:13:22 +08:00
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_FDCAN1_Init-FDCAN1-false-HAL-true,5-MX_FDCAN2_Init-FDCAN2-false-HAL-true,6-MX_FDCAN3_Init-FDCAN3-false-HAL-true,7-MX_SPI2_Init-SPI2-false-HAL-true,8-MX_TIM1_Init-TIM1-false-HAL-true,9-MX_TIM2_Init-TIM2-false-HAL-true,10-MX_TIM3_Init-TIM3-false-HAL-true,11-MX_TIM12_Init-TIM12-false-HAL-true,12-MX_UART5_Init-UART5-false-HAL-true,13-MX_UART7_Init-UART7-false-HAL-true,14-MX_USART1_UART_Init-USART1-false-HAL-true,15-MX_USART2_UART_Init-USART2-false-HAL-true,16-MX_USART3_UART_Init-USART3-false-HAL-true,17-MX_USART10_UART_Init-USART10-false-HAL-true,18-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,19-MX_I2C2_Init-I2C2-false-HAL-true,20-MX_SPI1_Init-SPI1-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
首次提交
2024-12-22 16:15:37 +08:00
RCC.ADCFreq_Value=50390625
RCC.AHB12Freq_Value=240000000
RCC.AHB4Freq_Value=240000000
RCC.APB1Freq_Value=120000000
RCC.APB2Freq_Value=120000000
RCC.APB3Freq_Value=120000000
RCC.APB4Freq_Value=120000000
RCC.AXIClockFreq_Value=240000000
RCC.CECFreq_Value=32000
RCC.CKPERFreq_Value=64000000
RCC.CortexFreq_Value=480000000
RCC.CpuClockFreq_Value=480000000
RCC.D1CPREFreq_Value=480000000
RCC.D1PPRE=RCC_APB3_DIV2
RCC.D2PPRE1=RCC_APB1_DIV2
RCC.D2PPRE2=RCC_APB2_DIV2
RCC.D3PPRE=RCC_APB4_DIV2
RCC.DFSDMACLkFreq_Value=120000000
RCC.DFSDMFreq_Value=120000000
RCC.DIVM1=5
RCC.DIVN1=96
RCC.DIVP1=1
RCC.DIVP1Freq_Value=480000000
RCC.DIVP2Freq_Value=50390625
RCC.DIVP3Freq_Value=50390625
RCC.DIVQ1=4
RCC.DIVQ1Freq_Value=120000000
RCC.DIVQ2Freq_Value=50390625
RCC.DIVQ3Freq_Value=50390625
RCC.DIVR1Freq_Value=240000000
RCC.DIVR2Freq_Value=50390625
RCC.DIVR3Freq_Value=50390625
RCC.FDCANFreq_Value=120000000
RCC.FMCFreq_Value=240000000
RCC.FamilyName=M
RCC.HCLK3ClockFreq_Value=240000000
RCC.HCLKFreq_Value=240000000
RCC.HPRE=RCC_HCLK_DIV2
RCC.I2C123Freq_Value=120000000
RCC.I2C4Freq_Value=120000000
RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
RCC.LPTIM1Freq_Value=120000000
RCC.LPTIM2Freq_Value=120000000
RCC.LPTIM345Freq_Value=120000000
RCC.LPUART1Freq_Value=120000000
RCC.LTDCFreq_Value=50390625
RCC.MCO1PinFreq_Value=64000000
RCC.MCO2PinFreq_Value=480000000
RCC.PLL2FRACN=0
RCC.PLL3FRACN=0
RCC.PLLFRACN=0
RCC.QSPIFreq_Value=240000000
RCC.RNGFreq_Value=48000000
RCC.RTCFreq_Value=32000
RCC.SAI1Freq_Value=120000000
RCC.SAI4AFreq_Value=120000000
RCC.SAI4BFreq_Value=120000000
RCC.SDMMCFreq_Value=120000000
RCC.SPDIFRXFreq_Value=120000000
RCC.SPI123Freq_Value=120000000
RCC.SPI45Freq_Value=120000000
RCC.SPI6Freq_Value=120000000
RCC.SWPMI1Freq_Value=120000000
RCC.SYSCLKFreq_VALUE=480000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.Tim1OutputFreq_Value=240000000
RCC.Tim2OutputFreq_Value=240000000
RCC.TraceFreq_Value=240000000
RCC.USART16Freq_Value=120000000
RCC.USART234578Freq_Value=120000000
RCC.USBFreq_Value=120000000
RCC.VCO1OutputFreq_Value=480000000
RCC.VCO2OutputFreq_Value=100781250
RCC.VCO3OutputFreq_Value=100781250
RCC.VCOInput1Freq_Value=5000000
RCC.VCOInput2Freq_Value=781250
RCC.VCOInput3Freq_Value=781250
SH.GPXTI10.0=GPIO_EXTI10
SH.GPXTI10.ConfNb=1
SH.GPXTI12.0=GPIO_EXTI12
SH.GPXTI12.ConfNb=1
SH.S_TIM12_CH2.0=TIM12_CH2,PWM Generation2 CH2
SH.S_TIM12_CH2.ConfNb=1
SH.S_TIM1_CH1.0=TIM1_CH1,PWM Generation1 CH1
SH.S_TIM1_CH1.ConfNb=1
SH.S_TIM1_CH3.0=TIM1_CH3,PWM Generation3 CH3
SH.S_TIM1_CH3.ConfNb=1
SH.S_TIM2_CH1_ETR.0=TIM2_CH1,PWM Generation1 CH1
SH.S_TIM2_CH1_ETR.ConfNb=1
SH.S_TIM2_CH3.0=TIM2_CH3,PWM Generation3 CH3
SH.S_TIM2_CH3.ConfNb=1
SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4
SH.S_TIM3_CH4.ConfNb=1
修改IMU
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SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
SPI1.CLKPhase=SPI_PHASE_2EDGE
SPI1.CLKPolarity=SPI_POLARITY_HIGH
SPI1.CalculateBaudRate=15.0 MBits/s
SPI1.DataSize=SPI_DATASIZE_8BIT
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SPI1.Direction=SPI_DIRECTION_2LINES
修改IMU
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SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,CLKPolarity,CLKPhase,BaudRatePrescaler
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SPI1.Mode=SPI_MODE_MASTER
SPI1.VirtualType=VM_MASTER
SPI2.CalculateBaudRate=60.0 MBits/s
SPI2.Direction=SPI_DIRECTION_2LINES
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
SPI2.Mode=SPI_MODE_MASTER
SPI2.VirtualType=VM_MASTER
STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0.DSPOoLibraryJjLibrary_Checked=true
STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0.IPParameters=LibraryCcDSPOoLibraryJjDSPOoLibrary
STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0.LibraryCcDSPOoLibraryJjDSPOoLibrary=true
STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0_SwParameter=LibraryCcDSPOoLibraryJjDSPOoLibrary\:true;
TIM1.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
TIM1.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
TIM1.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation3 CH3
TIM12.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
TIM12.IPParameters=Channel-PWM Generation2 CH2
TIM2.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
TIM2.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
TIM2.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation3 CH3
TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
修改IMU
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TIM3.IPParameters=Channel-PWM Generation4 CH4,Prescaler,Period
TIM3.Period=10000-1
TIM3.Prescaler=24-1
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UART5.BaudRate=100000
修改IMU
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UART5.IPParameters=BaudRate,WordLength,Parity,Mode
UART5.Mode=MODE_TX_RX
UART5.Parity=PARITY_EVEN
UART5.WordLength=WORDLENGTH_9B
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USART1.IPParameters=VirtualMode-Asynchronous
USART1.VirtualMode-Asynchronous=VM_ASYNC
USART10.IPParameters=VirtualMode
USART10.VirtualMode=VM_ASYNC
USART2.IPParameters=VirtualMode-Asynchronous,VirtualMode-Hardware Flow Control (RS485)
USART2.VirtualMode-Asynchronous=VM_ASYNC
USART2.VirtualMode-Hardware\ Flow\ Control\ (RS485)=VM_ASYNC
USART3.IPParameters=VirtualMode-Asynchronous,VirtualMode-Hardware Flow Control (RS485)
USART3.VirtualMode-Asynchronous=VM_ASYNC
USART3.VirtualMode-Hardware\ Flow\ Control\ (RS485)=VM_ASYNC
USB_DEVICE.CLASS_NAME_HS=CDC
USB_DEVICE.IPParameters=VirtualMode,VirtualModeHS,CLASS_NAME_HS
USB_DEVICE.VirtualMode=Cdc
USB_DEVICE.VirtualModeHS=Cdc_HS
USB_OTG_HS.IPParameters=VirtualMode-Device_Only_FS
USB_OTG_HS.VirtualMode-Device_Only_FS=Device_Only_FS
VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
VP_STMicroelectronics.X-CUBE-ALGOBUILD_VS_DSPOoLibraryJjLibrary_1.4.0_1.4.0.Mode=DSPOoLibraryJjLibrary
VP_STMicroelectronics.X-CUBE-ALGOBUILD_VS_DSPOoLibraryJjLibrary_1.4.0_1.4.0.Signal=STMicroelectronics.X-CUBE-ALGOBUILD_VS_DSPOoLibraryJjLibrary_1.4.0_1.4.0
VP_SYS_VS_tim14.Mode=TIM14
VP_SYS_VS_tim14.Signal=SYS_VS_tim14
VP_TIM12_VS_ClockSourceITR.Mode=TriggerSource_ITR0
VP_TIM12_VS_ClockSourceITR.Signal=TIM12_VS_ClockSourceITR
VP_TIM12_VS_ControllerModeClock.Mode=Clock Mode
VP_TIM12_VS_ControllerModeClock.Signal=TIM12_VS_ControllerModeClock
VP_TIM1_VS_ClockSourceITR.Mode=TriggerSource_ITR0
VP_TIM1_VS_ClockSourceITR.Signal=TIM1_VS_ClockSourceITR
VP_TIM1_VS_ControllerModeClock.Mode=Clock Mode
VP_TIM1_VS_ControllerModeClock.Signal=TIM1_VS_ControllerModeClock
VP_TIM2_VS_ClockSourceITR.Mode=TriggerSource_ITR0
VP_TIM2_VS_ClockSourceITR.Signal=TIM2_VS_ClockSourceITR
VP_TIM2_VS_ControllerModeClock.Mode=Clock Mode
VP_TIM2_VS_ControllerModeClock.Signal=TIM2_VS_ControllerModeClock
VP_USB_DEVICE_VS_USB_DEVICE_CDC_HS.Mode=CDC_HS
VP_USB_DEVICE_VS_USB_DEVICE_CDC_HS.Signal=USB_DEVICE_VS_USB_DEVICE_CDC_HS
board=custom
rtos.0.ip=FREERTOS